Very low-power parallel video processor pixel circuit

An image capturing and processing element comprising:

• a photodetector for detecting light that produces a signal corresponding to light incident upon said photodetector;
• a processor for producing a forward discrete wavelet transform of said signal;
• and
• a processor for producing a zerotree map from said forward discrete wavelet transform,
• wherein said photodetector, said processor for producing said forward discrete wavelet transform and said processor for producing said zerotree map reside on a common substrate.

An image processing element comprising:

• a processor for producing a forward discrete wavelet transform of a signal corresponding to an element of detected light;
• and
• a processor for producing a zerotree map from said forward discrete wavelet transform,
• wherein said processor for producing said forward discrete wavelet transform and said processor for producing said zerotree map reside on a common substrate.

An image processing element comprising:

• a processor for producing an inverse zerotree map from a signal corresponding to a pixel of an image;
• and
• a processor for producing an inverse discrete wavelet transform of said inverse zerotree map,
• wherein said processor for producing said inverse zerotree map and said processor for producing said inverse discrete wavelet transform reside on a common substrate.

An image processing element comprising:

• a processor for producing an inverse zerotree map from a signal corresponding to a pixel of an image;
• a processor for producing an inverse discrete wavelet transform of said inverse zerotree map;
• and
• a processor for producing a display control signal of said inverse discrete wavelet transform,
• wherein said processor for producing said inverse zerotree map, said processor for producing said inverse discrete wavelet transform and said processor for producing said display control signal reside on a common substrate.

An image processing element comprising:

• a processor for producing an inverse discrete wavelet transform of a signal corresponding to a pixel of an image;
• and
• a processor for producing a display control signal of said inverse discrete wavelet transform,
• wherein said processor for producing said inverse discrete wavelet transform and said processor for producing said display control signal reside on a common substrate.

An image processing element comprising:

• a processor for producing an inverse zerotree map from a signal corresponding to a pixel of an image;
• a processor for producing an inverse discrete wavelet transform of said inverse zerotree map;
• and
• a processor for producing a display control signal of said inverse discrete wavelet transform,
• wherein said processor for producing said inverse zerotree map, said processor for producing said inverse discrete wavelet transform and said processor for producing said display control signal reside on a common substrate.

An image processing element comprising:

• a processor for producing a zerotree map from a first signal corresponding to an element of detected light;
• and
• a processor for producing an inverse zerotree map from a second signal corresponding to a pixel of an image,
• wherein said processor for producing said zerotree map and said processor for producing said inverse zerotree map reside on a single substrate.

An image capturing, processing and displaying element, comprising:

• a photodetector for detecting light that produces a first signal corresponding to light incident upon said photodetector;
• a processor for producing a forward discrete wavelet transform of said first signal;
• a processor for producing a zerotree map from said forward discrete wavelet transform;
• a processor for producing an inverse zerotree map from a second signal corresponding to a pixel of an image;
• a processor for producing an inverse discrete wavelet transform of said inverse zerotree map;
• a processor for producing a display control signal from said inverse discrete wavelet transform;
• and
• display means responsive to said display control signal to produce a visual display,
• wherein said photodetector, said processor for producing said forward discrete wavelet transform, said processor for producing said zerotree map, said processor for producing said inverse zerotree map, and said processor for producing said inverse discrete wavelet transform reside on a common substrate.

An image capturing element comprising:

• a plurality of photodetectors each of which produce an analog signal corresponding to light incident upon said respective photodetector;
• and
• an analog to digital converter for selectively converting each of said analog signals to a corresponding digital signal,
• wherein said plurality of photodetectors and said analog to digital converter reside on a common substrate.

An image capturing element comprising:

• a photodetector for detecting light incident upon said photodetector having a first detector portion that produces a first signal corresponding to light of a first frequency band, a second detector portion that produces a second signal corresponding to light of a second frequency band, and a third detector portion that produces a third signal corresponding to light of a third frequency band;
• and
• a processor for space division multiplexing said first signal, said second signal and said third signal,
• wherein said photodetector and said processor for space division multiplexing reside on a common substrate.