Clock data recovery circuitry associated with programmable logic device circuitry

Apparatus for producing and transmitting a CDR signal comprising:

• PLD circuitry configured to produce data information;
• input circuitry configured to receive a reference clock signal;
• and
• output circuitry configured to use the reference clock signal to produce the CDR signal including the data information.

Apparatus for receiving an information signal which includes data information having clock information for the data information embedded in the data information comprising:

• first input circuitry configured to receive the information signal;
• second input circuitry configured to receive a reference clock signal having a reference frequency which is related to a frequency of the clock information by a predetermined scale factor;
• reference clock signal processing circuitry configured to use the information signal and the reference clock signal to produce a recovered clock signal having phase and frequency which respectively correspond to a phase and a frequency of the clock information;
• and
• data recovery circuitry configured to use the recovered clock signal and the information signal to produce a data output signal indicative of the data information in the information signal.

Apparatus for transmitting an information signal which includes data information having clock information for the data information embedded in the data information comprising:

• input circuitry configured to receive a reference clock signal having a reference frequency which is related to a frequency of the clock information by a predetermined scale factor;
• reference clock signal processing circuitry configured to use the reference clock signal to produce a further reference clock signal having the frequency of the clock information;
• data source circuitry configured to produce a data signal indicative of the data information;
• and
• data signal processing circuitry configured to process the data signal in accordance with the further reference clock signal to produce the information signal.