Semiconductor processing methods of forming integrated circuitry and semiconductor processing methods of forming dynamic random access memory (DRAM) circuitry

A semiconductor processing method of forming integrated circuitry comprising:

• forming a photomasking layer over a substrate;
• contemporaneously forming openings in the photomasking layer over substrate areas where impurities are to be provided, and other substrate areas where etching is to take place;
• and
• in separate steps, doping the substrate with impurities through said openings and etching the substrate through said openings.

A semiconductor processing method of forming integrated circuitry comprising:

• forming two conductive lines over a substrate;
• forming a masking layer over the two conductive lines;
• forming two openings through the masking layer in the same step, one of the openings being received over one conductive line, another of the openings being received over the other conductive line;
• providing impurity through the one opening and into the substrate proximate the one conductive line;
• and
• removing material over the other conductive line through the other opening to at least partially form a contact opening over the other conductive line.

A semiconductor processing method of forming integrated circuitry comprising:

• forming two conductive lines over a substrate, the lines comprising first and second insulative materials which are different from one another;
• forming a masking layer over the two conductive lines;
• forming two openings through the masking layer, one of the openings being received over one of the conductive lines, another of the openings being received over the other conductive line;
• providing impurity through the one opening and into the substrate proximate the one conductive line;
• and
• etching one of the first and second insulative materials to at least partially form a contact opening to at least one of the conductive lines.

A semiconductor processing method of forming DRAM circuitry comprising:

• forming a plurality of conductive lines over a substrate, some of the conductive lines being formed over a memory array area of the substrate, other conductive lines being formed over a substrate area comprising a peripheral area proximate the memory array;
• forming a masking layer over the substrate;
• in the same masking step, forming a plurality of openings through the masking layer over the peripheral area while keeping the memory array masked with the masking layer;
• providing impurity through the openings;
• and
• removing material from over the conductive lines through the openings.