Method and circuit for minimizing the charging effect during manufacture of semiconductor devices

A method of manufacturing a semiconductor chip, the method comprising the steps of:

• defining protection transistors as the transistors of the chip which connect terminals of sensitive devices to ground;
• having antennas connected to gates of said protection transistors;
• and
• collecting charge said antennas during at least one plasma-based process so as to activate said protection transistors to provide a current path to ground during said process.

A semiconductor chip comprising:

• at least one sensitive device to be protected against the charging effect during manufacture;
• a metal line electrically connected to a sensitive terminal of said at least one sensitive device;
• a protection transistor whose drain is connected to said metal line and whose source is connected to a ground supply via a first metal connection line;
• and
• an antenna and a ring around said antenna, said antenna and ring formed from the same metal layer as said metal line wherein said antenna is connected to the gate of said protection transistor and said ring is connected to a drain of said protection transistor;
• wherein at least said first connection line is formed from said same metal layer as said metal line.

A semiconductor chip comprising:

• at least one sensitive device to be protected against the charging effect during manufacture;
• a protection metal line connected to a sensitive terminal of said at least one sensitive device and formed from a first metal layer;
• at least one other metal line connected to said protection metal line and formed from a second metal layer;
• a protection transistor whose drain is connected to said protection metal line and whose source is connected to a ground supply via a first metal connection line;
• and
• an antenna formed from said first metal layer wherein said antenna is connected to the gate of said protection transistor;
• wherein at least said first connection line is formed from said first metal layer.

A semiconductor chip comprising:

• at least one sensitive device to be protected against the charging effect during manufacture;
• a protection metal line connected to a sensitive terminal of said at least one sensitive device and formed from a first metal layer;
• at least one other metal line connected to said protection metal line and formed from a second metal layer;
• a protection transistor whose drain is connected to said protection metal line and whose source is connected to a ground supply via a first metal connection line;
• and
• a first antenna formed from said first metal layer wherein said antenna is connected to the gate of said protection transistor;
• a second antenna formed from said second metal layer and connected to said first antenna,
• wherein at least said first connection line is formed from said first metal layer.

A semiconductor chip comprising:

• a plurality of sensitive devices to be protected against the charging effect during manufacture;
• a multiplicity of protection metal lines each connected to a sensitive terminal of some of said plurality of sensitive devices, said protection metal lines formed from a first metal layer;
• at least one p-channel transistor connected to each of said protection metal lines and having an n-well;
• a protection transistor whose drain is connected to said n-well and whose source is connected to a ground supply via a first metal connection line;
• and
• an antenna formed from said first metal layer wherein said antenna is connected to the gate of said protection transistor;
• wherein at least said first connection line is formed from said first metal layer.