High charge storage density integrated circuit capacitor

A method of fabricating an integrated circuit comprising a capacitor, comprising the steps of:

• providing a substrate having a silicon electrode with a protective layer deposited thereon;
• removing said protective layer, thereby exposing an Si surface on said electrode;
• exposing said Si surface to NO under time and temperature conditions sufficient to produce a silicon oxynitride layer on said Si surface, said silicon oxynitride layer having an average thickness of less than 1 nm;
• and
• forming an alternative dielectric material dielectric layer on said silicon oxynitride layer.

A method of fabricating an integrated circuit comprising a capacitor comprising the steps of:

• providing a substrate having a silicon electrode with a protective layer deposited thereon;
• removing said protective layer, thereby exposing an Si surface on said electrode;
• exposing said Si surface to NO at a partial pressure of 1 to 10 Torr for 1 to 100 seconds at one or more temperatures between 700° C. and 800° C., thereby forming a silicon oxynitride layer on said Si surface having an average thickness of less than 1 nm;
• and
• forming an alternative dielectric material dielectric layer on said silicon oxynitride layer.

An integrated circuit having a capacitor fabricated thereon, said capacitor comprising:

• a silicon electrode;
• a dielectric layer of an alternative dielectric material overlying said electrode;
• and
• a silicon oxynitride layer, having a thickness less than 1 nm, formed by exposure of said silicon electrode to NO and interposed between said electrode and said dielectric layer.