Stacked semiconductor device and semiconductor system

A stacked semiconductor device comprising:

• a plurality of stacked wiring substrates each including a plurality of via-holes in which connection electrodes are formed and wires electrically connected to the connection electrodes;
• an uppermost wiring substrate stacked on a top of the stacked wiring substrates and including a plurality of via-holes in which connection electrodes are formed and wires electrically connected to the connection electrodes;
• a plurality of semiconductor devices mounted on the respective wiring substrates and electrically connected to the wires thereof;
• a plurality of conductive via insulation substrates each having a cavity which is larger than the semiconductor device enclosed therein and each including a plurality of via-holes in which connection electrodes are formed, each of the conductive via insulation substrates being stacked on each of the wiring substrates;
• and
• a plurality of conductive layers formed on a top surface of the uppermost wiring substrate and/or a bottom surface of a lowermost wiring substrate formed under the stacked wiring substrates,
• wherein the wiring substrates, the uppermost wiring substrate, and the conductive via insulation substrates are electrically connected to each other by the connection electrodes.