Method and system for robust distributed circuit synthesis
AssigneeSun Microsystems, Inc.
InventorsWILLIAM K LAM, LIANG CHEN
Life of this patent
Estimating the term…
Abstract
Based upon a circuit design, a system generates a plurality of subdesigns. An initial circuit constraint is used to generate a plurality of constraints, one for each subdesign. The plurality of subdesigns and the corresponding constraints are distributed to a plurality of processors. In parallel, the processors execute a design software application to generate a plurality of candidate circuits based on the constraints and the subdesigns. The best candidate of the plurality of candidate circuits may be used for additional iterations in the design process.
Claims16
A method of generating a circuit comprising the steps of:
- (a) receiving a circuit design;
- (b) receiving an initial circuit constraint;
- (c) generating a plurality of subdesigns based on the circuit design;
- (d) generating a plurality of constraints based on the initial circuit constraint, each constraint corresponding to a subdesign;
- (e) distributing each subdesign and corresponding constraint to one of a plurality of processors;
- and
- (f) generating, in parallel, a plurality of candidate circuits based on the plurality of subdesigns and constraints.
An apparatus for generating a circuit comprising:
- a memory storing program instructions, and
- a processor configured according to the program instructions to perform the steps of:
- (a) receiving a circuit design;
- (b) receiving an initial circuit constraint;
- (c) generating a plurality of subdesigns based on the circuit design;
- (d) generating a plurality of constraints based on the initial circuit constraint, each constraint corresponding to a subdesign;
- (e) distributing each subdesign and corresponding constraint to one of a plurality of processors;
- and
- (f) generating, in parallel, a plurality of candidate circuits based on the plurality of subdesigns and constraints.
A computer-usable medium having computer-readable code embodied therein for generating a circuit, the computer-usable medium comprising:
- (a) a component configured to obtain a circuit design;
- (b) a component configured to obtain an initial circuit constraint;
- /
- (c) a component configured to generate a plurality of subdesigns based on the circuit design;
- (d) a component configured to generate a plurality of constraints based on the initial circuit constraint, each constraint corresponding to a subdesign;
- (e) a component configured to distribute each subdesign and corresponding constraint to one of a plurality of processors;
- and
- (f) a component configured to generate, in parallel, a plurality of candidate circuits based on the plurality of subdesigns and constraints.
A system for generating a circuit comprising:
- (a) means for receiving a circuit design;
- (b) means for receiving an initial circuit constraint;
- (c) means for generating a plurality of subdesigns based on the circuit design
- (d) means for generating a plurality of constraints based on the initial circuit constraint, each constraint corresponding to a subdesign;
- (e) means for distributing each subdesign and corresponding constraint to one of a plurality of processors;
- and
- (f) means for generating, in parallel, a plurality of candidate circuits based on one of the plurality of subdesigns and constraints.
Dependencies are inferred from the claim text.