Metallization outside protective overcoat for improved capacitors and inductors
AssigneeTexas Instruments Incorporated
InventorsJohn P. Erdeljac, Louis Nicholas Hutter, M. Ali Khatibzadeh, John Kenneth Arch
Life of this patent
Estimating the term…
Abstract
A thick layer of copper is formed on the outside the protective overcoat (PO) which protects an integrated circuit, and forms both an inductor and the upper electrode of a capacitor. Placing this layer outside the PO greatly reduces parasitic capacitances with the substrate in the devices.
Claims20
An integrated circuit structure, comprising:
- a first circuit portion enclosed by a protective overcoat with bond pad openings;
- an inductor formed of a low resistance material on said protective overcoat.
An integrated circuit structure, comprising:
- a first circuit portion enclosed by a protective overcoat with bond pad openings;
- a low-resistance structure which forms one electrode of a capacitor, said low-resistance structure at least partially overlying said protective overcoat.
An integrated circuit structure, comprising:
- a first circuit portion enclosed by a protective overcoat with bond pad openings;
- an inductor formed of a low-resistance material, said inductor being outside said protective overcoat;
- an encapsulating material, said encapsulating material encapsulating both said first circuit portion, said protective overcoat, and said low-resistance structure.
An integrated circuit structure, comprising:
- a first circuit portion enclosed by a protective overcoat with bond pad openings, said first circuit portion including a metallization layer which forms a first electrode of a capacitor;
- a low-resistance structure which forms a second electrode of a capacitor, said low-resistance structure being at least partially outside said protective overcoat;
- an encapsulating material, said encapsulating material encapsulating both said first circuit portion, said protective overcoat, and said low-resistance structure.
An integrated circuit structure, comprising an inductor, a high-Q capacitor, and a power transistor on the same chip.
A fabrication method, comprising the steps of:
- (a.) covering a first circuit portion with a protective overcoat;
- (b.) forming bond pad openings through said protective overcoat;
- and
- (c.) forming an inductor of a low-resistance material on an exposed surface of said protective overcoat.
A fabrication method, comprising the steps of:
- (a.) forming a first circuit portion which includes a first electrode of a capacitor;
- (b.) covering said first circuit portion with a protective overcoat;
- (c.) forming openings through said protective overcoat including bond pad openings and an opening at said first electrode;
- (d.) depositing a capacitor dielectric over exposed portions of said first electrode;
- and
- (e.) forming a second electrode of said capacitor overlying said first electrode, said second electrode at least partially overlying said protective overcoat.
A method of fabrication, comprising the step of forming an inductor, a high-Q capacitor, and a power transistor on a single semiconductor chip.
Dependencies are inferred from the claim text.