Package for semiconductor chip
AssigneeSeiko Epson Corporation
InventorTakashi Takamura
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AssigneeSeiko Epson Corporation
InventorTakashi Takamura
Estimating the term…
The present invention provides a package for enclosing a semiconductor chip and having a plurality of terminals, wherein the terminals are connected with each other by a conductive member in a manner that the electrical connection is disabled by an action of mounting the package on a printed circuit board. During storage, the terminals that are connected by a conductive material are in a short-circuited state until such time immediately before the package is mounted on a printed circuit board. This package prevents high voltage that results from static electricity between the terminals from being applied to circuits of the chip during storage or handling. Therefore, the short-circuited state maintained between the terminals is released after the mounting process, with the result that the operation of the semiconductor chip is not obstructed. The mounting of the package on a printed circuit board may be by soldering the terminals, and the conductive members are solder lines or a conductive thin film that are melt during mounding. The mounting may alternatively be by inserting the terminals into sockets, and the conductive members are wires connecting the terminals that are cut during mounting.
A package for enclosing a semiconductor chip comprising:
A method for preventing electrostatic damages to a semiconductor chip package during storage, the package having a plurality of terminals, the method comprising:
Dependencies are inferred from the claim text.