Semiconductor memory device and method for the manufacture thereof
AssigneeHyundai Electronics Industries Co., Ltd.
InventorYong-Ku Baek
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device including an active matrix comprising a semiconductor substrate, a transistor formed on the semiconductor substrate and isolation regions for isolating the transistor, a first metal pattern formed on top of the active matrix and extending outside the transistor, a capacitor structure formed over the transistor, a barrier layer formed on top of the capacitor structure to improve thermal stability, and a second metal pattern formed on top of the capacitor structure to electrically connect the capacitor structure to the transistor through the first and second metal patterns.
Claims23
A semiconductor memory device, comprising:
- an active matrix formed on a semiconductor substrate, the active matrix comprising a transistor formed on the semiconductor substrate and isolation regions for isolating the transistor;
- a first metal pattern formed on the active matrix, the first metal pattern contacting the transistor and extending over an isolation region;
- a capacitor, the capacitor being positioned above and generally vertically aligned with the transistor;
- a barrier layer formed on the capacitor;
- and
- a second metal pattern, the second metal pattern contacting the capacitor and contacting the first metal pattern, thereby forming an electrical connection between the capacitor and the transistor.
A method for manufacturing a semiconductor memory device, the method comprising the steps of:
- a) preparing an active matrix, the active matrix comprising a semiconductor substrate, a transistor formed on the semiconductor substrate, and a first insulating layer formed around the transistor;
- b) forming a first metal pattern, the first metal pattern providing a contact to the transistor;
- c) forming a second insulating layer over the first metal pattern;
- d) forming a capacitor on the second insulating layer, the capacitor being positioned vertically above the transistor;
- e) forming a barrier layer on top of the capacitor;
- and
- f) forming a second metal pattern, the second metal pattern providing electrical contact between the capacitor and the first metal pattern.
Dependencies are inferred from the claim text.