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US 2001/0019138 A1Published application
Lateral thyristor structure for protection against electrostatic discharge
AssigneeMicronas GmbH
InventorsMartin Czech, Jurgen Kessel, Eckart Wagner, Ulrich Theus
Life of this patent
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Abstract
To protect against electrostatic discharges in monolithic integrated circuits in CMOS technology, a lateral thyristor structure is presented which has a much lower firing voltage compared to conventional thyristor structures.
Claims12
A lateral thyristor structure for protection against electrostatic discharge, comprising:
- a semiconductor substrate (20) of a first conduction type, with a surface;
- a well region (21) of a second conduction type, opposite to said first conduction type, which is introduced into said surface of said semiconductor substrate;
- a first strongly doped region (22) of said second conduction type that is introduced into said surface of said semiconductor substrate (20) and is electrically connected to a first terminal (26);
- a second strongly doped region (23) of said first conduction type that is introduced into said well region (21) and is electrically connected to a second terminal (27);
- a third strongly doped region (24) of said second conduction type, which is introduced into said well region (21), is electrically connected to said second terminal (27), and is spatially arranged between said first strongly doped region (22) and said second strongly doped region (23);
- and
- a fourth strongly doped region (25) of said second conduction type, which is introduced into said surface of said semiconductor substrate (20) and into said well region (21), and is spatially situated above a pn junction that is formed between said semiconductor substrate (20) and said well region (21), and between said third strongly doped region (24) and said first strongly doped region (22).
4 more elements
A lateral thyristor structure for protection against electrostatic discharge, comprising:
- a semiconductor substrate of a first conduction type, with a surface;
- a well region of a second conduction type, opposite to said first conduction type, which is introduced into said surface of said semiconductor substrate;
- a first strongly doped region of said second conduction type that is introduced into said surface of said semiconductor substrate and is electrically connected to a first terminal;
- a second strongly doped region of said second conduction type that is introduced into said well region and is electrically connected to a second terminal;
- a third strongly doped region of said second conduction type, which is introduced into said well region, is electrically connected to said second terminal, and is spatially arranged between said first strongly doped region and said second strongly doped region;
- and
- a fourth strongly doped region of said second conduction type, which is introduced into said surface of said semiconductor substrate and into said well region, and is spatially situated above a pn junction that is formed between said semiconductor substrate and said well region, and between said third strongly doped region and said first strongly doped region.
4 more elements
Dependencies are inferred from the claim text.