Integrated dynamic memory cell having a small area of extent, and a method for its production

An integrated dynamic memory cell having a small area of extent, comprising:

• a semiconductor substrate having a trench formed therein and defined by a bottom and side walls, including a first side wall and a second side wall opposite said first side wall;
• a selection MOSFET disposed on said first side wall of said trench, said selection MOSFET having a gate connection area which is to be connected to a word line, a source connection doping area which is to be connected to a bit line, and a connection doping area forming said bottom of said trench and a drain connection doping area of said selection MOSFET;
• a thin dielectric layer;
• a memory MOSFET disposed on said second side wall of said trench and having a source connection doping area, a gate connection area which is connected through said thin dielectric layer to said connection doping region and said connection doping region connecting said source connection doping area of said memory MOSFET to said drain connection doping area of said selection MOSFET, and said memory MOSFET having a drain connection doping area which is to be connected to a supply voltage;
• and
• a connecting area formed from n-polysilicon connected to said thin dielectric, and tunnel currents flowing through said thin dielectric layer can be varied by a doping of said connecting area and by a doping of said connection doping region, said thin dielectric layer having a thickness of less than two nm so that the tunnel currents flow between said gate connection area of said memory MOSFET and said connection doping region.