Semiconductor device
AssigneeNEC Corporation
InventorIchiro Yamamoto
Life of this patent
Estimating the term…
Loading patent…
AssigneeNEC Corporation
InventorIchiro Yamamoto
Estimating the term…
To provide a semiconductor device configuration in which a cell capacitor with an MIM or MIS structure is formed using a conductive material with a low resistivity such as Ru for the upper electrode and a resistance element is formed using a conductive material with high resistance such as polysilicon without causing any practical increase of fabrication process. A plate electrode to be used for the upper electrode of the cell capacitor and also for the resistance element is formed by forming a three-layer structure of a low resistance conductive layer of Ru or the like, an insulating film layer of SiO2 or the like on the conductive layer, and a high resistance conductive material layer of polysilicon or the like on the insulating film layer, patterning the three-layer structure in the same shape, and using the low resistance conductive material layer of Ru or the like as the upper electrode of the cell capacitor and the high resistance conductive material layer of polysilicon or the like as the resistance element.
A semiconductor device comprising a plate electrode as a constituent element, wherein said plate electrode has a three-layer structure composed of a low resistance conductive material layer, an insulating film layer with a predetermined film thickness on the former layer, and a high resistance conductive material layer on the insulating film layer, wherein said three layers of the three-layer structure are patterned in the same shape.
Dependencies are inferred from the claim text.