Method and apparatus for generating and distributing a clock signal

An apparatus that generates a clock signal within an integrated circuit, comprising:

• four clocking elements arranged in a ring, wherein each clocking element has at least one input and at least one output, wherein a signal at an input is complemented at a corresponding output;
• wherein an output of each clocking element is coupled to at least one input of each of two neighboring clocking elements;
• wherein the four clocking elements are spatially distributed throughout the integrated circuit so that each clocking element provides the clock signal to a different region of the integrated circuit;
• and
• a plurality of interconnections between the four clocking elements, wherein each output of each clocking element is coupled to at least one input of a neighboring clocking element;
• wherein a given signal is inverted an odd number of times in traversing a closed path beginning and ending at any output of any of the four clocking elements and passing through a neighboring clocking element;
• wherein each of the four clocking elements contains,
• a first node,
• a second node,
• a keeper circuit coupled between the first node and the second node,
• a first pair of inverters, each of which has an output coupled to the first node, and
• a second pair of inverters, each of which has an output coupled to the second node.

A method for generating a clock signal within an integrated circuit, the method operating through use of four clocking elements arranged in a ring, wherein each clocking element has at least one input and at least one output, wherein a signal at an input is complemented at a corresponding output, where the four clocking elements are coupled together through a plurality of interconnections, wherein each output of each clocking element is coupled to at least one input of a neighboring clocking element, wherein a given signal is inverted an odd number of times in traversing a closed path beginning and ending at any output of any clocking element and passing through a neighboring clocking element, the method comprising:

• placing the four clocking elements throughout the integrated circuit so that each clocking element provides the clock signal to an associated region of the integrated circuit;
• routing a plurality of clock distribution networks throughout the integrated circuit, so that each clock distribution network distributes the clock signal from a clocking element to circuit elements within the associated region;
• and
• operating the four clocking elements so that the four clocking elements oscillate to provide the clock signal.

An apparatus that generates a clock signal through a closed loop clocking system within an integrated circuit, comprising:

• a plurality of clocking elements;
• a plurality of couplings between the plurality of clocking elements;
• wherein each of the plurality of clocking elements is configured to oscillate at substantially the same frequency;
• wherein the plurality of couplings creates a closed loop so that a disturbance at one clocking element or at one coupling causes other clocking elements in the plurality of clocking elements to compensate their oscillations, so that the plurality of clocking elements continue to oscillate at substantially the same frequency with substantially the same phase relationships between clocking elements.