Loading patent…
AssigneeKoninklijke Philips Electronics N.V.
InventorsArnoldus Johannes Maria Emmerik, Rene Paul Zingg, Johannes Van Zwol
Estimating the term…
The invention relates to a SOI deep depletion MOS transistor provided in a thin silicon layer (5) adjoining a surface (4) of a silicon body (3) and insulated from a silicon substrate (7) by a buried oxide layer (6). The channel region (13) of a first conductivity type is provided with at least one and preferably a plurality of zones (16) of the opposite conductivity type adjoining the surface to remove minority carriers from the interface between the channel and the gate oxide (15). The zones (16) extend across the whole thickness of the channel and adjoin the buried oxide at the side of the channel remote from the gate dielectric. Due to this construction, minority carriers are removed also from the rear side of the channel. This enables the transistor to be operative also at high voltages having values at which the substrate and the buried oxide operate as a second gate and as a second gate dielectric, respectively. The transistor may be used to advantage in high-voltage ICs comprising a low-voltage circuit part operated with a low supply voltage generated by the transistor.
A semiconductor device with a MOS transistor of the depletion type comprising a semiconductor body with a semiconductor layer of a first conductivity type adjoining a surface of said body, a semiconductor substrate situated at the side of the semiconductor layer facing away from the surface, and a layer of electrically insulating material, referred to as insulating layer hereinafter, disposed between the semiconductor layer and the semiconductor substrate, which semiconductor layer is provided with a source and a drain in the form of surface zones of the first conductivity type which are mutually separated by an interposed channel region of the first conductivity type, while the surface is covered with a gate dielectric on which a gate electrode is provided, characterized in that the semiconductor layer is provided with at least one zone of the opposed, second conductivity type for the purpose of removing minority charge carriers from the channel region, which zone is provided with an electrical connection, forms a pn junction with the channel region, and extends transversely across the thickness of the semiconductor layer between the surface and the insulating layer.
A semiconductor device as claimed in any one of the preceding claims, characterized in that a drift region is situated in the semiconductor layer between the channel region and the drain.
A semiconductor device as claimed in any one of the preceding claims, characterized in that the zone or zones of the second conductivity type is or are conductively connected to the gate electrode.
Dependencies are inferred from the claim text.