Transistor heat dissipation structure

A transistor comprising:

• a semiconductor substrate having a top surface and a backside;
• a source terminal that has a first contact that directly contacts the top surface of the semiconductor substrate;
• a drain terminal that has a second contact that directly contacts the top surface of the semiconductor substrate;
• a semiconductor heterostructure including a channel region formed on the top surface of the semiconductor substrate, wherein the semiconductor heterostructure has a top surface, wherein the source and drain contacts are supported by and located at the top surface of the semiconductor heterostructure, and wherein the channel region is configured to provide an electrically conductive path between the source terminal and the drain terminal;
• an elongated gate electrode at the top surface of the semiconductor heterostructure between the source and drain contacts, wherein the gate electrode extends laterally from a first end of the gate electrode to a second end of the gate electrode in a first direction that is parallel to the top surface of the semiconductor substrate;
• a first elongated cooling trench directly below and directly physically connected to the first contact of the source terminal, wherein the first elongated cooling trench extends laterally from a first end of the first elongated cooling trench to a second end of the first elongated cooling trench along the first direction, and the first elongated cooling trench also extends vertically from the first contact of the source terminal through the channel region and through an entire thickness of the semiconductor heterostructure, through the top surface of the semiconductor substrate and toward, but not to, the backside of the semiconductor substrate;
• and
• a second elongated cooling trench directly below and directly physically connected to the second contact of the drain terminal, wherein the second elongated cooling trench extends laterally from a first end of the second elongated cooling trench to a second end of the second elongated cooling trench along the first direction, and the second elongated cooling trench also extends vertically from the second contact of the drain terminal through the channel region and through the entire thickness of the semiconductor heterostructure, through the top surface of the semiconductor substrate and toward, but not to, the backside of the semiconductor substrate,
• wherein the first and second elongated cooling trenches are filled throughout with a thermally-conductive material configured to dissipate heat from the channel region into the semiconductor substrate.

A method of fabricating a transistor, the method comprising:

• providing a semiconductor substrate, wherein the substrate has a top surface and a backside;
• forming a semiconductor heterostructure including a channel region on the top surface of the semiconductor substrate, wherein the semiconductor heterostructure has a top surface;
• forming a first elongated cooling trench that extends laterally from a first end of the first elongated cooling trench to a second end of the first elongated cooling trench along a first direction that is parallel to the top surface of the semiconductor substrate, and wherein the first elongated cooling trench also extends vertically from the top surface of the channel region through the channel region and through the semiconductor heterostructure, through the top surface of the semiconductor substrate and toward, but not to, the backside of the semiconductor substrate;
• filling the first elongated cooling trench throughout with a thermally-conductive material configured to dissipate heat from the channel region into the semiconductor substrate, wherein, once filled with the thermally-conductive material, the first elongated cooling trench is not configured to be in electrical communication with the backside of the semiconductor substrate;
• forming a first current terminal with a first contact that directly contacts the top surface of the semiconductor heterostructure, wherein the first current terminal is selected from one of a source terminal and a drain terminal, the first contact is directly above and directly physically connected to the first elongated cooling trench, and the first elongated cooling trench is not configured to convey current from the first current terminal to the backside of the semiconductor substrate, and;
• forming a second current terminal with a second contact at the top surface of the semiconductor heterostructure, wherein the second current terminal is selected from another one of the source terminal and the drain terminal, and the channel region is configured to provide an electrically conductive path between the first contact and the second contact;
• and
• forming an elongated gate electrode at the top surface of the semiconductor heterostructure between the first and second contacts, wherein the gate electrode extends laterally from a first end of the gate electrode to a second end of the gate electrode in the first direction.