Silicidation process for semiconductor devices
AssigneeTokyo Electron Limited
InventorsRobert D. Clark, Steven Consiglio
Life of this patent
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Abstract
A method of forming a device includes providing a substrate containing an exposed semiconductor region, forming a metal oxide film over the exposed semiconductor region, and forming an oxygen-scavenging metal film over the metal oxide film. The method includes chemically reducing the metal oxide film to an elemental metal film by scavenging oxygen from the metal oxide film into the oxygen-scavenging metal film; and reacting the elemental metal film with the semiconductor region to form a metal-semiconductor layer, the metal-semiconductor layer forming a source/drain contact region of a transistor.
Claims19
A method of forming a device, the method comprising:
- providing a substrate containing an exposed semiconductor region;
- forming a nickel oxide film over the exposed semiconductor region;
- forming an oxygen-scavenging metal film over the nickel oxide film;
- chemically reducing the nickel oxide film to an elemental nickel film by scavenging oxygen from the nickel oxide film into the oxygen-scavenging metal film;
- reacting, at a first temperature, the elemental nickel film with the exposed semiconductor region to form an intermediate layer containing atoms from the elemental nickel film and atoms from the exposed semiconductor region, the intermediate layer having a first resistivity of 24 micro-ohm*cm;
- removing remaining portions of the elemental nickel film and the oxygen-scavenging metal film after forming the intermediate layer;
- and
- after the removing, annealing at a second temperature above the first temperature to convert the intermediate layer to a nickel silicide layer, the nickel silicide layer having a second resistivity of 10.5 micro-ohm*cm, the nickel silicide layer forming a source/drain contact region of a transistor.
A method of forming source/drain regions, comprising:
- providing a substrate containing first and second semiconductor regions;
- selectively forming a metal oxide film over the first semiconductor region;
- forming an oxygen-scavenging metal film over the first and second semiconductor regions, wherein a thickness of the oxygen-scavenging metal film is two times or more of a thickness of the metal oxide film;
- chemically reducing the metal oxide film to an elemental metal film by scavenging oxygen from the metal oxide film into the oxygen-scavenging metal film;
- reacting the elemental metal film with the first semiconductor region to form a metal semiconductor film;
- reacting the oxygen-scavenging metal film with the second semiconductor region to form an oxygen-scavenging metal semiconductor film;
- and
- annealing to reduce resistivities of the metal semiconductor film and the oxygen-scavenging metal semiconductor film.
A method of forming a device, the method comprising:
- providing a substrate containing first and second semiconductor regions;
- selectively forming a nickel oxide film over the first semiconductor region;
- forming a titanium metal film over the first and second semiconductor regions;
- chemically reducing the nickel oxide film to an elemental nickel metal film by oxygen scavenging from the nickel oxide film to the titanium metal film;
- reacting the elemental nickel metal film with the first semiconductor region to form a nickel semiconductor film;
- and
- reacting the titanium metal film with the second semiconductor region to form a titanium semiconductor film, wherein the chemically reducing step and the reacting steps include a heat-treating step;
- removing unreacted portions of the elemental nickel metal film and unreacted portions of the titanium metal film after forming the nickel semiconductor film and the titanium semiconductor film;
- and
- annealing to:
- convert the titanium semiconductor film to a titanium silicide layer, the titanium silicide layer comprising a lower resistance than a resistance of the titanium semiconductor film;
- and
- convert the nickel semiconductor film to a nickel silicide layer, the nickel silicide layer comprising a lower resistance than a resistance of the nickel semiconductor film, the annealing being performed at a higher temperature than the heat-treating step.
Dependencies are inferred from the claim text.