Semiconductor device and method for manufacturing semiconductor device

A method for manufacturing a semiconductor device comprising:

• forming a first oxide insulating layer;
• forming an oxide semiconductor layer above the first oxide insulating layer;
• exposing the first oxide insulating layer by forming a pattern of the oxide semiconductor layer above the first oxide insulating layer;
• forming a gate insulating layer above the oxide semiconductor layer;
• forming a gate electrode above the gate insulating layer;
• exposing the oxide semiconductor layer and the first oxide insulating layer by forming a pattern of the gate insulating layer and the gate electrode above the oxide semiconductor layer;
• implanting an impurity into the exposed oxide semiconductor layer and the first oxide insulating layer;
• forming a second oxide insulating layer above each of the first oxide insulating layer, the oxide semiconductor layer, and the gate electrode;
• implanting an impurity into the second oxide insulating layer;
• and
• forming a nitride insulating layer above the second oxide insulating layer, wherein
• the semiconductor device is divided into a first region overlapping the gate electrode, a second region not overlapping the gate electrode and overlapping the oxide semiconductor layer, and a third region not overlapping the gate electrode and the oxide semiconductor layer, and
• a peak of a profile of the impurity in a thickness direction of the oxide insulating layer and the first oxide insulating layer exists in the oxide insulating layer in the third region.

A method for manufacturing a semiconductor device comprising:

• forming a first oxide insulating layer;
• forming an oxide semiconductor layer above the first oxide insulating layer;
• exposing the first oxide insulating layer by forming a pattern of the oxide semiconductor layer above the first oxide insulating layer;
• forming a gate insulating layer above the oxide semiconductor layer;
• forming a gate electrode above the gate insulating layer;
• exposing the oxide semiconductor layer and the first oxide insulating layer by forming a pattern of the gate insulating layer and the gate electrode above the oxide semiconductor layer;
• forming a second oxide insulating layer having a hydrogen content of 1×1021 cm−3 or less above each of the first oxide insulating layer, the oxide semiconductor layer, and the gate electrode;
• implanting an impurity into the oxide semiconductor layer, the first oxide insulating layer, and the second oxide insulating layer;
• and
• forming a nitride insulating layer above the second oxide insulating layer, wherein
• the semiconductor device is divided into a first region overlapping the gate electrode, a second region not overlapping the gate electrode and overlapping the oxide semiconductor layer, and a third region not overlapping the gate electrode and the oxide semiconductor layer, and
• a peak of a profile of the impurity in a thickness direction of the oxide insulating layer and the first oxide insulating layer exists in the oxide insulating layer in the third region.