NLDMOS semiconductor device

A semiconductor device, comprising:

• a substrate having a first conductivity type;
• a shallow trench isolation (STI) structure disposed in the substrate in a form of a first ring-like structure, wherein a portion of the substrate surrounded by the STI structure serves as an active area;
• a drain doped region disposed at a top of a central portion of the active area and having a second conductivity type that is opposite to the first conductivity type;
• two source doped regions having the second conductivity type, wherein the source doped regions are disposed at the top of the active area on opposite sides of the drain doped region and are spaced apart from the drain doped region, and wherein a line connecting the drain doped region and the source doped regions defines a first direction, and a second direction is defined to be perpendicular to the first direction in a plane of the substrate, wherein the two source doped regions are arranged along the first direction without being arranged along the second direction;
• a field oxide layer disposed over a top surface of the substrate within the active area, the field oxide layer being in a form of a second ring-like structure and surrounding the drain doped region, wherein an outer boundary of the field oxide layer is spaced from the STI structure by a predetermined distance that is greater than 0;
• a gate polysilicon that is disposed over the top surface of the substrate and is in a form of a third ring-like structure surrounding the field oxide layer, wherein the gate polysilicon extends in the first direction from a position over the source doped regions to a position over the field oxide layer, wherein the gate polysilicon extends in the second direction from a position over the STI structure to a position over the field oxide layer, and wherein a gate oxide layer is provided between the gate polysilicon and the substrate;
• and
• a drift region having the second conductivity type, wherein the drift region is disposed in the substrate, surrounds the drain doped region and is spaced apart from the source doped regions, and wherein the drift region extends in the second direction to a position under the STI structure,
• wherein a portion of the active area extending in the second direction acts as a withstand voltage region of the device;
• and a portion of the active area extending in the first direction between the drain doped region and the source doped regions serves as an operating and withstand voltage region of the device.