Semiconductor device and method for fabricating the same
AssigneeNanya Technology Corporation
InventorHung-Chi Tsai
Life of this patent
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Abstract
The present application discloses semiconductor device, including a gate structure arranged on a substrate; a plurality of word lines arranged apart from the gate structure; two porous spacers arranged on two sides of the gate structure; and a first insulating layer arranged on the substrate laterally surrounding the gate structure and the porous spacers; and a second insulating layer arranged over the first insulating layer, wherein a top surface of the gate structure, top surfaces of the plurality of word lines and a top surface of the second insulating layer are level with each other, and wherein a porosity of the porous spacers is between about 25% and about 100%.
Claims20
A method for fabricating a semiconductor device, comprising:
- providing a substrate;
- forming a gate structure on the substrate;
- forming a plurality of word lines on the substrate and apart from the gate structure, having top surfaces at a same vertical level as a top surface of the gate structure;
- depositing an energy-removable material on two sides of the gate structure;
- performing an energy treatment to transform the energy-removable material into a porous spacer, wherein a porosity of the porous spacer layer is between about 25% and about 100%;
- attaching a spacer to an outer side of the porous spacer;
- and
- forming a first insulating layer on the substrate and laterally surrounding the gate structure;
- wherein the spacer is made of a same material of the porous spacer;
- wherein each of the porous spacer and the is constructed to have a skeleton and a plurality of empty spaces disposed and distributed among the skeleton;
- wherein the forming of the plurality of word lines comprises:
- forming a plurality of word line trenches penetrating through the first insulating layer and into the substrate;
- and
- depositing a plurality of word line electrodes on the plurality of word line trenches.
A method for fabricating a semiconductor device, comprising:
- providing a substrate;
- forming a gate structure on the substrate;
- depositing dummy spacers on two sides of the gate structure;
- depositing a first insulating layer over the substrate and the word lines to laterally surround the dummy spacers;
- forming a plurality of word lines on the substrate and apart from the gate structure, wherein a top surface of the gate structure is level with top surfaces of the word lines;
- and
- removing the dummy spacers and forming porous spacers on two sides of the gate structure;
- wherein the dummy spacers are formed by:
- forming a spacer layer to cover a top surface of the substrate, a top surface of the gate structure, and the two sides of the gate structure;
- and
- via an etching process, removing portions of the spacer layer on the top surface of the substrate and the top surface of the gate structure, wherein remaining portions of the spacer layer form the dummy spacers on the two sides of the gate structure.
Dependencies are inferred from the claim text.