Dynamic random access memory and forming method therefor

A method for forming a dynamic random access memory, comprising:

• providing a substrate, which has opposite first and second surfaces, and comprises several discrete active areas parallel to a first direction and arranged in a second direction, wherein the first direction is perpendicular to the second direction, each of the active areas comprises a plurality of isolation regions, a plurality of channel regions, and a plurality of word line regions, and in each of the active areas, the isolation regions and the channel regions are arranged at intervals in the first direction, and the word line regions are disposed between adjacent isolation regions and channel regions;
• forming in the word line regions a plurality of word line gate trenches, which extend from the first surface to the second surface, and run through the active areas along the second direction;
• forming a word line gate structure in the word line gate trenches;
• forming a plurality of first doped source/drain regions in the first surface;
• forming on the first surface a plurality of bit line layers, which are parallel to the first direction, and each of which is electrically coupled to the first doped source/drain regions of the plurality of channel regions in one of the active areas;
• forming a plurality of second doped source/drain regions in the second surface;
• thinning the substrate in a direction from the second surface to the first surface;
• etching the isolation regions in the direction from the second surface to the first surface, so as to form in the substrate a plurality of first isolation openings, which are parallel to the second direction;
• forming a first isolation layer in the first isolation openings;
• etching a part of the channel regions in the direction from the second surface to the first surface, so as to form a second isolation opening in the channel regions;
• forming a second isolation layer in the second isolation opening;
• and
• forming on the second surface a plurality of capacitor structures, each of which is electrically coupled to one of the second doped source/drain regions.