Method for manufacturing semiconductor device including supporting layer to reinforce 3D memory structure

A method of manufacturing a semiconductor device, comprising:

• providing a substrate;
• forming a word line on the substrate, the word line extending along a first direction;
• forming a first capacitor, the first capacitor extending along a second direction different from the first direction and located at a first level;
• forming a second capacitor, the second capacitor extending along the second direction and located at a second level different from the first level;
• forming a first bit line electrically connected to the first capacitor and the word line, the first bit line extending along a third direction and located at a third level;
• and
• forming a second bit line electrically connected to the second capacitor and the word line, the second bit line extending along the third direction and located at the third level, wherein bottom surfaces of the first bit line and the second bit line are coplanar;
• wherein the third direction is perpendicular to the first direction and the second direction;
• wherein the first level, the second level and the word line are disposed between the third level and the substrate;
• wherein forming the word line comprises:
• forming a first dielectric layer on the substrate;
• forming a first semiconductor layer on the first dielectric layer;
• forming a second dielectric layer on the first semiconductor layer;
• forming a second semiconductor layer on the second dielectric layer;
• patterning the first dielectric layer, the first semiconductor layer, the second dielectric layer and the second semiconductor layer to forming a trench;
• forming the word line within the trench;
• removing the first dielectric layer and the second dielectric layer to form an opening;
• and
• forming a supporting layer within the opening.