Active electronic signal crosstalk cancellation

A system comprising:

• a transmitter multiple integrated circuit (IC) chiplet package including a system on a chip (SOC), the SOC including a processor and a transmitter chiplet, the transmitter chiplet including:
• a transmission amplifier to receive a first digital signal and generate a first analog output signal, the first digital signal including a crosstalk signal caused by a second digital signal;
• a crosstalk cancellation circuit to receive the second digital signal and generate an analog cancellation signal, the analog cancellation signal configured to cancel the crosstalk signal within the first digital signal without requiring a crosstalk cancellation capacitor, the crosstalk cancellation circuit including:
• an edge detection circuit to detect a first edge transition within the first digital signal and detect a second edge transition within the second digital signal;
• a pulse generation circuit to generate a pulse signal based on the first edge transition and the second edge transition;
• and
• an analog cancellation circuit to generate the analog cancellation signal based on the pulse signal;
• and
• a first conductive node to generate a first crosstalk canceled signal by combining the first analog output signal with the analog cancellation signal.

A system comprising:

• a CMOS transmission amplifier branch circuit to generate an analog output signal based on a first digital signal, the first digital signal including a crosstalk signal caused by a second digital signal;
• a CMOS crosstalk cancellation branch circuit to generate an analog cancellation signal, the analog cancellation signal configured to cancel the crosstalk signal within the first digital signal without requiring a crosstalk cancellation capacitor;
• and
• a conductive cancellation node coupled to the CMOS transmission amplifier branch circuit and to the CMOS crosstalk cancellation branch circuit, the conductive cancellation node to generate a first crosstalk canceled signal by combining the analog output signal with the analog cancellation signal;
• an input logic circuit to generate an input data up signal and an input data down signal based on the first digital signal;
• wherein the CMOS transmission amplifier branch circuit includes:
• a transmission pMOS amplifier to receive the input data up signal;
• a transmission nMOS amplifier to receive the input data down signal;
• and
• a transmission node coupled between the transmission pMOS amplifier and the transmission nMOS amplifier, the transmission node to conduct the analog output signal to the conductive cancellation node.