Bootstrapped comparator

A top-plate sampled comparator comprising:

• sampling transistors;
• sampling switches;
• non-linear capacitors comprising parasitic capacitances of an input device of the comparator;
• and
• circuitry configured to pre-condition the comparator by maintaining a constant voltage across the parasitic capacitances of the input device of the comparator during a sampling phase of the comparator in order to maintain sampling linearity of the comparator, wherein the circuitry is configured to maintain the constant voltage by coupling an analog input signal of the comparator to a gate, a drain, and a source of the input device of the comparator during the sampling phase such that voltages across the parasitic capacitances of the input device are held substantially constant during the sampling phase.

A successive approximation register analog-to-digital converter comprising:

• a reference digital-to-analog converter;
• a successive approximation register;
• and
• a top-plate sampled comparator configured to compare a reference signal generated by the reference digital-to-analog converter to an analog input signal in order to generate a comparator output to the successive approximation register, the comparator comprising:
• sampling transistors;
• sampling switches;
• non-linear capacitors comprising parasitic capacitances of an input device of the comparator;
• and
• circuitry configured to pre-condition the comparator by maintaining a constant voltage across the parasitic capacitances of the input device capacitors of the comparator during a sampling phase of the comparator in order to maintain sampling linearity of the comparator, wherein the circuitry is configured to maintain the constant voltage by coupling the analog input signal to a gate, a drain, and a source of the input device of the comparator during the sampling phase such that voltages across the parasitic capacitances of the input device are held substantially constant during the sampling phase.