Tunable homojunction field effect device-based unit circuit and multi-functional logic circuit

A tunable homojunction field effect device-based unit circuit, wherein the unit circuit E comprises:

• a first input terminal Vin1 for receiving a first input voltage signal;
• a second input terminal Vin2 for receiving a second input voltage signal;
• a third input terminal Vin3 for receiving a third input voltage signal;
• a first tunable homojunction field effect transistor M1, wherein a source S1 of the first tunable homojunction field effect transistor M1 is coupled to the first input terminal, a gate electrode 1a close to the source S1 is connected to the second input terminal, and a gate electrode 1b close to a drain of the first tunable homojunction field effect transistor M1 is coupled to the third input terminal;
• a second tunable homojunction field effect transistor M2, wherein a source S2 of the second tunable homojunction field effect transistor M2 is coupled to the third input terminal, a gate electrode 2a close to the source S2 is connected to the second input terminal, and a gate electrode 2b close to a drain of the second tunable homojunction field effect transistor M2 is coupled to the first input terminal;
• wherein the drain of the first tunable homojunction field effect transistor is connected to the drain of the second tunable homojunction field effect transistor, and an output of a connection point therebetween is used as an output terminal Vout;
• wherein the first tunable homojunction field effect transistor M1 and the second tunable homojunction field effect transistor M2 have the same structure, comprising a substrate insulating material, a channel material layer, an insulating layer, and a metal electrode layer;
• the metal electrode layer comprises a drain electrode layer, a source electrode layer, a gate electrode layer A, and a gate electrode layer B, the gate electrode layer A and the gate electrode layer B are fabricated side by side on the substrate insulating material, and a gap is left between the gate electrode layer A and the gate electrode layers B to ensure electrical insulation therebetween, the insulating layer completely covers the gate electrode layer A and the gate electrode layer B, the drain electrode layer is placed on a left edge of the channel material layer above the gate electrode layer A, and the source electrode layer is placed on a right edge of the channel material layer above the gate electrode layer B, that is, the gate electrode layer A corresponds to the gate electrode 1b of M1, and the gate electrode layer A corresponds to the gate electrode 2b of M2, the gate electrode layer B corresponds to the gate electrode 1a of M1, and the gate electrode layer B corresponds to the gate electrode 2a of M2.