Resetting integrated circuits
AssigneeMicron Technology, Inc.
InventorsLeon Zlotnik, Leonid Minz, Yoav Weinberg
Life of this patent
Estimating the term…
Abstract
A plurality of flip-flops of an integrated circuit (IC) (e.g., an ASIC) are electrically connected in a predefined series. The scan input gate of any give flip-flop in the predefined series is electrically connected to one of a Q output gate or a Q-bar output gate of an adjacent flip-flop in the predefined series. A reset operation for the IC occurs by feeding a bit string of identical bits (e.g., all zeros) through the scan input gate of a first flip-flop of the plurality of flip-flops to reset the plurality of flip-flops without the need for resetting circuitry and accompanying power savings for the IC.
Claims17
An apparatus, comprising:
- a plurality of flip-flops electrically connected in a predefined series, the plurality of flip-flops comprising:
- a first flip-flop configured to receive a bit string of identical bits, wherein a first predefined bit is output from the first flip-flop and input to a second flip-flop in the predefined series;
- and
- a final flip-flop configured to produce a scan out chain of bits from either a first output or a second output of the final flip-flop, wherein the scan out chain of bits is different than the identical bits of the bit string.
A method, comprising:
- electrically connecting a plurality of flip-flops in a predefined series by:
- electrically connecting in series each flip-flop of a portion of the plurality of flip-flops to an adjacent flip-flop of the portion of the plurality of flip-flops between a first output of each flip-flop of the portion and a scan input of the adjacent flip-flop of the portion;
- and
- electrically connecting in series each flip-flop of another portion of the plurality of flip-flops to an adjacent flip-flop of the another portion of the plurality of flip-flops between a second output of each flip-flop of the another portion and a scan input of the adjacent flip-flop of the another portion;
- and
- feeding a bit string through the scan input of a first flip-flop of the plurality of flip-flops to reset the plurality of flip-flops.
An apparatus, comprising:
- a plurality of flip-flops electrically connected in a predefined series, wherein a first output of one flip-flop of a portion of the plurality of flip-flops is electrically connected to a scan input of an adjacent flip-flop of the portion of the plurality of flip-flops;
- and
- circuitry configured to provide a bit string of identical bits to a first flip-flop of the plurality of flip-flops for resetting of the apparatus;
- wherein:
- the plurality of flip-flops further comprises a first series of flip-flops and the portion of the plurality of flip-flops is a second series of flip-flops;
- and
- a second output of each flip-flop of the first series of flip-flops is electrically connected to a scan input of an adjacent flip-flop in the first series.
Dependencies are inferred from the claim text.