Phased array and electronic device

An apparatus, comprising:

• a circuit board comprising:
• one or more processors;
• and
• a transceiver coupled to the one or more processors and comprising:
• a phased array comprising:
• a local oscillator signal adjustment path comprising:
• a first input end configured to:
• couple to a first local oscillator signal source;
• and
• receive a first local oscillator signal, wherein the local oscillator signal adjustment path is configured to adjust the first local oscillator signal to generate a first signal;
• and
• a first output end configured to send the first signal;
• a first adder comprising:
• a second input end coupled to the first output end and configured to receive the first signal;
• a third input end configured to be coupled to a transmit path and configured to receive a second signal, wherein the first adder is configured to superpose the first signal on the second signal to generate a to-be-transmitted signal;
• and
• a second output end configured to send the to-be-transmitted signal;
• a first power divider comprising:
• a fourth input end coupled to the second output end and configured to receive the to-be-transmitted signal, wherein the first power divider is configured to divide the to-be-transmitted signal into a plurality of transmit signals;
• and
• a third output end configured to send the plurality of transmit signals;
• and
• a plurality of radio-frequency signal transmit channels comprising:
• fifth input ends coupled to the third output ends and configured to receive the plurality of transmit signals, wherein the plurality of radio-frequency signal transmit channels are configured to process the plurality of transmit signals to generate processed transmit signals;
• and
• fifth output ends configured to be coupled to a plurality of antennas and configured to transmit, through the plurality of antennas, the processed transmit signals.

An apparatus, comprising:

• a local oscillator signal adjustment path comprising a first output end configured to send a first signal;
• a transmit path comprising an intermediate-frequency signal processor, wherein the intermediate-frequency signal processor comprises a second output end configured to send a second signal;
• a first adder comprising:
• a first input end coupled to the first output end and configured to receive the first signal;
• a second input end coupled to the second output end and of the transmit path and configured to receive the second signal, wherein the first adder is configured to superpose the first signal on the second signal to generate a to-be-transmitted signal;
• and
• a third output end configured to send the to-be-transmitted signal;
• a first power divider comprising:
• a third input end coupled to the third output end and configured to receive the to-be-transmitted signal, wherein the first power divider is configured to divide the to-be-transmitted signal into a plurality of transmit signals;
• and
• fourth output ends configured to send the plurality of transmit signals;
• and
• a plurality of radio-frequency signal transmit channels comprising:
• fourth input ends coupled to the fourth output ends and configured to receive the plurality of transmit signals from the fourth output ends, wherein the plurality of radio-frequency signal transmit channels are configured to process the plurality of transmit signals to generate processed transmit signals;
• and
• fifth output ends configured to be coupled to a plurality of antennas and configured to transmit, through the plurality of antennas, the processed transmit signals.