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US 12,770,698 B2Granted
Memory device performing program operation and method of operating the same
AssigneeSK hynix Inc.
InventorHee Youl Lee
Life of this patent
Estimating the term…
Abstract
A memory device according to the present technology includes a memory cell, a page buffer including a plurality of latches storing a result of comparing a threshold voltage of the memory cell with a pre-verify voltage and a main verify voltage, and, a program operation control circuit configured to control the page buffer to apply a first program control voltage to a bit line connected to the memory cell while a program voltage is applied to a word line connected to the memory cell based on the number of times pass data indicating that the threshold voltage of the memory cell exceeds the pre-verify voltage is sensed by the page buffer.
Claims18
A memory device comprising:
- a memory cell;
- a page buffer comprising a latch storing a result of comparing a threshold voltage of the memory cell to a pre-verify voltage and a main verify voltage;
- and
- a program operation control circuit configured to control the page buffer to apply a first program control voltage to a bit line connected to the memory cell while a program voltage is applied to a word line connected to the memory cell based on a cumulative number of times, across a plurality of program loops, pass data indicating that the threshold voltage of the memory cell exceeds the pre-verify voltage is sensed by the page buffer;
- wherein the page buffer further comprises:
- a first pre-sensing latch configured to store pre-verify data indicating whether the threshold voltage of the memory cell exceeds the pre-verify voltage in a first program loop;
- a first main sensing latch configured to store main verify data indicating whether the threshold voltage of the memory cell exceeds the main verify voltage in the first program loop;
- a second pre-sensing latch configured to store the pre-verify data indicating whether the threshold voltage of the memory cell exceeds the pre-verify voltage in a second program loop;
- and
- a second main sensing latch configured to store the main verify data indicating whether the threshold voltage of the memory cell exceeds the main verify voltage in the second program loop.
7 more elements
A memory device comprising:
- a memory cell;
- a first pre-sensing latch configured to store data indicating a result of a pre-verify operation on the memory cell in a first program loop;
- a second pre-sensing latch configured to store data indicating a result of the pre-verify operation on the memory cell in a second program loop;
- a voltage generation circuit configured to generate voltages to be applied to a word line and a bit line connected to the memory cell;
- and
- a program operation control circuit configured to control the voltage generation circuit to apply a voltage to a bit line connected to the memory cell in a third program loop according to whether the data stored in the first pre-sensing latch and the second pre-sensing latch match each other;
- a first main sensing latch configured to store fail data indicating a fail of a main verify operation on the memory cell in the first program loop;
- and
- a second main sensing latch configured to store the fail data indicating the failure of the main verify operation on the memory cell in the second program loop.
6 more elements
A method of operating a memory device, the method comprising:
- applying a program voltage to a word line connected to a memory cell in a first program loop;
- identifying a threshold voltage of the memory cell using a pre-verify voltage in the first program loop;
- and
- applying a bit line voltage to a bit line connected to the memory cell in a second program loop based on a cumulative number of times, across a plurality of program loops, the threshold voltage of the memory cell is identified as a threshold voltage greater than the pre-verify voltage;
- wherein the memory device comprises:
- a page buffer comprising:
- a latch storing a result of comparing the threshold voltage of the memory cell to the pre-verify voltage and a main verify voltage;
- a first pre-sensing latch configured to store pre-verify data indicating whether the threshold voltage of the memory cell exceeds the pre-verify voltage in the first program loop;
- a first main sensing latch configured to store main verify data indicating whether the threshold voltage of the memory cell exceeds the main verify voltage in the first program loop;
- a second pre-sensing latch configured to store the pre-verify data indicating whether the threshold voltage of the memory cell exceeds the pre-verify voltage in the second program loop;
- and
- a second main sensing latch configured to store the main verify data indicating whether the threshold voltage of the memory cell exceeds the main verify voltage in the second program loop.
9 more elements
Dependencies are inferred from the claim text.