Display circuitry with complementary low power driving scheme

Display circuitry comprising:

• an array of display pixels, each of which comprises a light-emitting diode having:
• an anode terminal coupled to a first power supply terminal configured to receive a positive power supply voltage;
• and
• a cathode terminal coupled to a second power supply terminal configured to receive a ground power supply voltage;
• and
• a gate driver circuit configured to output a control signal to a row of display pixels in the array, wherein the control signal is driven between the positive power supply voltage and the ground power supply voltage.

A display pixel comprising:

• a light-emitting diode having a cathode coupled to a ground power supply line and having an anode;
• an emission transistor having a first source-drain terminal coupled to a positive power supply line, a second source-drain terminal coupled to the anode, and a gate terminal configured to receive an emission control signal being operated at a first frequency, wherein the emission transistor comprises a p-type silicon transistor;
• and
• an anode reset transistor having a first source-drain terminal coupled to the anode, a second source-drain terminal coupled to a voltage line on which an anode reset voltage is provided, and a gate terminal configured to receive a scan control signal being operated at a second frequency different than the first frequency, wherein the anode reset transistor comprises an n-type semiconducting oxide transistor.