Information processing circuit and information processing method

An information processing method, comprising:

• obtaining a plurality of initial neural signals that are different, through a signal acquisition circuit;
• and
• processing the plurality of initial neural signals by using a plurality of memristors through a signal processing circuit comprising the plurality of memristors,
• wherein processing the plurality of initial neural signals by using the plurality of memristors comprises:
• extracting the plurality of initial neural signals by using a preprocessing array to obtain a plurality of feature information, wherein the plurality of memristors comprise a plurality of first memristors, and the plurality of first memristors are arranged in an array to obtain the preprocessing array;
• wherein the preprocessing array comprises M rows #N columns of the first memristors, and comprises M first signal lines and N second signal lines,
• each of the first memristors comprises a first end and a second end;
• first ends of the first memristors in an m-th row are connected to an m-th first signal line, and second ends of the first memristors in an n-th column are connected to an n-th second signal line;
• the N second signal lines are configured to receive the plurality of initial neural signals, so that N first memristors located on a same row form a filter to extract at least one feature information of the plurality of initial neural signals,
• the M first signal lines are configured to output the plurality of feature information,
• wherein M and N are integers and are both greater than 1, m is an integer greater than or equal to 1 and less than or equal to M, and n is an integer greater than or equal to 1 and less than or equal to N;
• wherein the information processing method further comprises acquiring a plurality of inverse neural signals of the plurality of initial neural signals through the signal acquisition circuit, wherein the plurality of initial neural signals are a plurality of initial neural pulse signals, the plurality of inverse neural signals are pulse signals and correspond to the plurality of initial neural pulse signals one by one, an absolute value of an amplitude of each inverse neural signal is equal to an absolute value of an amplitude of a corresponding initial neural signal, and a polarity of each inverse neural signal is opposite to a polarity of the corresponding initial neural signal;
• the N first memristors located on the same row are divided into a plurality of first memristor pairs, each of the first memristor pairs corresponds to one element in a coefficient vector of the filter respectively, and each of the first memristor pairs comprises two first memristors that are different,
• wherein a first memristor of each first memristor pair is configured to receive an initial neural signal selected from the plurality of initial neural signals, and the other first memristor in each first memristor pair is configured to receive an inverse neural signal corresponding to the initial neural signal selected from the plurality of initial neural signals;
• in a process of processing the plurality of initial neural signals through the plurality of memristors, conductance values of the plurality of memristors are unchanged.