System and method for optimizing bill of material cost and power performance of platform system-on-chip in mobile devices

A method for optimizing Bill of Material (BOM) cost and power performance in a System-on-chip (SOC), wherein the SOC comprises a plurality of Central Processing Unit (CPU) cores with Single Instruction Multiple Data (SIMD) extensions and excludes any Digital Signal Processor (DSP) core, comprising:

• receiving and recording (301) raw video;
• encoding (302) video frame samples by a video codec encoder module implemented on a first CPU core of the SOC;
• post-processing (303) the encoded video samples by implementing an in-loop deblocking filter on another CPU core of the SOC received from the first CPU core;
• implementing pipelined processing between the first CPU cores and another CPU core of the SOC;
• and
• outputting (305) the post-processed video having a bit-exact result on the CPU cores as compared to a result generated using a DSP implementation, wherein each CPU core having an Arithmetic Logic Unit designed without saturation logic in critical instructions, including Multiply and Accumulate (MAC) and shift instructions.