US 12,769,684 B2 · Address translation services buffer

Abstract

An address translation buffer or ATB is provided for emulating or implementing the PCIe (Peripheral Component Interface Express) ATS (Address Translation Services) protocol within a PCIe-compliant device. The ATB operates in place of (or in addition to) an address translation cache (ATC), but is implemented in firmware or hardware without requiring the robust set of resources associated with a permanent hardware cache (e.g., circuitry for cache control and lookup). A component of the device (e.g., a DMA engine) requests translation of an untranslated address, via a host input/output memory management unit for example, and the response (including a translated address) is stored in the ATB for use for a single DMA operation (which may involve multiple transactions across the PCIe bus).

Claims20

Dependent claims

An electronic device, comprising:

an address translation buffer used for storing address translations received from a host computer system;
and
a direct memory access (DMA) circuit, the DMA circuit configured to:
issue a translation request to the host computer system regarding an untranslated address;
receive an address translation comprising a translated address corresponding to the untranslated address;
and
store the address translation in the address translation buffer in response to the address translation meeting a reuse condition associated with a likelihood of reuse of the address translation.

4 more elements

Dependencies are inferred from the claim text.

Address translation services buffer

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Address translation services buffer

Life of this patent

Abstract

Claims20