Address translation cache (ATC) for virtualized transaction based devices

An address translation cache (ATC) system, comprising:

• circuitry configured to:
• receive a translation request, the translation request comprising a command identifier (ID) associated with a command and at least one guest physical address (GPA), the at least one GPA being associated with at least one physical region page (PRP) located in a host memory;
• and
• store address translation information in a multi-table cache memory, the address translation information comprising at least one system physical address (SPA) of the host memory translated from the at least one GPA, wherein the address translation information is indexed based on the command ID.

A method by an address translation cache (ATC) system, the method comprising:

• receiving a translation request, the translation request comprising a command identifier (ID) associated with a command and a guest physical address (GPA) bundle having at least one GPA, the at least one GPA associated with at least one physical region page (PRP) located in a host memory;
• storing address translation information in a multi-table cache memory, the address translation information comprising at least one system physical address (SPA) of the host memory translated from the at least one GPA, wherein the address translation information is indexed based on the command ID;
• and
• transmitting a translation response after the address translation information is stored in the multi-table cache memory.