Data erasure system for performing an erasure operation by concurrently overwriting data on two or more banks of memory
AssigneeBAE SYSTEMS plc
InventorRichard Harrison
Life of this patent
Estimating the term…
Abstract
A data erasure system (100) comprising a memory (101) comprising a plurality of banks (101a-n). The data erasure system (100) further comprises a processor (102) configured to write data to and/or read data from one of the plurality of banks (101a-n) at a time. The data erasure system (100) further comprises an erasure module (106) configured to perform an erasure operation by overwriting data on two or more of the plurality of banks (101a-n) concurrently, wherein overwriting data on one of the two or 10 more banks (101a-n) is independent of overwriting data on another of the two or more banks (101a-n).
Claims15
A data erasure system comprising:
- a memory comprising a plurality of banks;
- a shared bus;
- a plurality of dedicated buses, each dedicated bus corresponding to a respective one of the plurality of banks;
- a processor configured to write data to and/or read data from one of the plurality of banks at a time;
- and
- an erasure module configured to perform an erasure operation by overwriting data on two or more of the plurality of banks concurrently, wherein overwriting data on one of the two or more banks is independent of overwriting data on another of the two or more banks,
- a plurality of switching circuits comprising a switching circuit for each of the plurality of banks, each of the switching circuits configured to electrically couple one of the processor or the erasure module to a respective one of the banks, wherein each switching circuit is configured to couple the processor to the respective one of the banks via the shared bus, and wherein each switching circuit is configured to couple the erasure module to the respective one of the banks via a respective one of the dedicated buses.
A backup power system for a data erasure system, the backup power system comprising:
- a backup power source configured to output a first voltage;
- a step-up converter configured to receive the first voltage from the backup power source and to output a second voltage higher than the first voltage;
- and
- a capacitor bank comprising one capacitor or a plurality of capacitors connected in parallel, the capacitor bank configured to be charged by the output of the step-up converter, and wherein the capacitor bank is configured to supply power to a data erasure system;
- wherein the data erasure system comprises an erasure module coupled to a memory, the backup power system further comprising a power management circuit comprising control logic configured to:
- monitor the output of the backup power source;
- determine whether the output of the backup power source is below a predetermined threshold voltage indicative of the backup power source having sufficient electrical power to erase the memory;
- and
- upon determining that the output of the backup power source is below the predetermined threshold, cause the erasure module to initiate erasing of the memory.
Dependencies are inferred from the claim text.