US 12,769,644 B1 · Free block address management for compressed data storage

Abstract

The present disclosure describes aspects of free block address management for compressed data storage. In various aspects, a memory controller maintains addresses of free blocks of a memory through a linked list of address storage blocks stored in the memory. An address storage block may include addresses of the free blocks of the memory and an address to a next address storage block of the linked list (e.g., block freelist). As the memory controller writes data to the free blocks of the memory and consumes the addresses stored in the address storage blocks, the memory controller can release the address storage blocks as free blocks. When the free blocks and associated addresses are used up, the remaining address storage blocks are released, and no memory is needed to maintain the list of free blocks. By so doing, the described aspects can reduce free block management overheard and improve memory efficiency.

Claims20

Dependent claims

A method for managing addresses of free blocks of a memory, the method comprising:

receiving, at a memory controller and from a host, a request to store data to a memory coupled to the memory controller;
compressing the data to provide compressed data;
loading, from the memory to a storage element of the memory controller, a block of address information of a block freelist that is stored in the memory as multiple blocks of address information;
releasing, after loading the block of address information to the storage element of the memory controller, the block of address information maintained in the memory to the block freelist;
obtaining addresses of free blocks of the memory from the block of address information of the block freelist;
and
writing, by the memory controller and based on the addresses obtained from the block of address information, the compressed data to the free blocks of the memory.

4 more elements

An apparatus comprising:

a host interface;
a memory interface;
a compression engine;
a storage element;
a hardware-based processor configured to execute instructions;
and
a hardware-based memory storing processor-executable instructions that, responsive to execution, implement a memory controller with free block address management, the memory controller configured to:
receive, via the host interface, a request to store data to a memory coupled to the memory interface;
compress, via the compression engine, the data to provide compressed data;
load, from the memory to the storage element, a block of address information of a block freelist that is stored in the memory as multiple blocks of address information;
release, after loading the block of address information to the storage element of the memory controller, the block of address information maintained in the memory to the block freelist;
obtain addresses of free blocks of the memory from the block of address information of the block freelist;
and
write, based on the addresses obtained from the block of address information, the compressed data to the free blocks of the memory.

11 more elements

Dependencies are inferred from the claim text.

Free block address management for compressed data storage

Life of this patent

Free block address management for compressed data storage

Life of this patent

Abstract

Claims20