Memory device, memory system, and operating method of the memory device
AssigneeSK hynix Inc.
InventorChoung Ki Song
Life of this patent
Estimating the term…
Abstract
A memory system may include a memory device, a controller configured to control the memory device through an in-band interface, and a baseboard management controller configured to control the memory device through a side-band interface. The memory device is configured to enter a self-refresh mode based on in-band signals that are received through the in-band interface and to terminate a self-refresh mode based on side-band signals that are received through the side-band interface.
Claims17
A memory system comprising:
- a memory device;
- a controller configured to control the memory device through an in-band interface;
- and
- a baseboard management controller configured to control the memory device through a side-band interface,
- wherein the memory device is configured to enter a self-refresh mode based on in-band signals that are received through the in-band interface and to terminate the self-refresh mode based on side-band signals that are received through the side-band interface, and
- wherein a reception circuit is activated on termination of the self-refresh mode.
A memory device comprising:
- a reception circuit configured to receive in-band signals from a controller through an in-band interface;
- a first command decoding circuit configured to generate a normal command by decoding an output of the reception circuit;
- a transmission and reception circuit configured to transmit and receive side-band signals to and from a baseboard management controller through a side-band interface;
- a second command decoding circuit configured to generate a setting command by decoding an output of the transmission and reception circuit;
- a mode register set configured to store setting information based on the setting command and output, as a setting signal, the stored setting information;
- and
- at least one internal circuit configured to operate based on the normal command and the setting signal.
An operating method of a memory device, the operating method comprising:
- entering a standby state based on in-band signals that are received through an in-band interface;
- generating a setting command by decoding side-band signals that are received through a side-band interface;
- outputting setting information that has been stored in a mode register set based on the setting command;
- and
- switching from the standby state to an active state and terminating a self-refresh mode based on the setting information.
An operating method of a memory device, the operating method comprising:
- entering a self-refresh mode based on in-band signals that are received through an in-band interface;
- deactivating at least one reception circuit for receiving the in-band signals based on entering the self-refresh mode;
- receiving a termination command in the self-refresh mode through a side-band interface;
- activating the reception circuit that has been deactivated in response to the reception of the termination command;
- and
- terminating the self-refresh mode in response to the termination command.
Dependencies are inferred from the claim text.