Semiconductor device and method of manufacturing semiconductor device

A method of manufacturing a semiconductor device, comprising:

• a first step of forming a trench penetrating a pn junction portion and partitioning an element region in a semiconductor layer by selectively etching the semiconductor layer, which includes a first main surface on one side and a second main surface on the other side and in which the pn junction portion extending along the first main surface is formed, and forming a semiconductor wall portion erected on a bottom wall of the trench by using a part of the semiconductor layer and facing a side wall of the trench across a space;
• a second step of forming a first insulating film along the side wall and the bottom wall of the trench by thermal oxidation, modifying the semiconductor wall portion into an insulator by the thermal oxidation, and forming an insulator wall portion facing the first insulating film on the side wall of the trench across the space;
• a third step of forming a side wall insulating film including the first insulating film, an embedded insulating film, the insulator wall portion and a second insulating film on the side wall of the trench, and a bottom wall insulating film including the first insulating film and the second insulating film on the bottom wall of the trench, by depositing an insulating material in the trench to form the embedded insulating film back-filling the space and the second insulating film extending along the side wall of the insulator wall portion and the bottom wall of the trench on the opposite side of the space;
• and
• a fourth step of forming an embedded electrode back-filling the trench by depositing a conductive material in the trench,
• wherein a thickness of the side wall insulating film in a direction intersecting a depth direction of the trench is 2 μm or more and 6 μm or less.

A method of manufacturing a semiconductor device, comprising:

• a first step of forming a trench group including at least three annular trenches arranged concentrically with each other, penetrating a pn junction portion and partitioning an element region in a semiconductor layer by selectively etching the semiconductor layer, which includes a first main surface one side and a second main surface on the other side and in which the pn junction portion extending along the first main surface is formed, wherein the trench group includes a main trench and a plurality of sub-trenches arranged inside and outside the main trench and having a smaller width than the main trench;
• a second step of forming a first insulating film along a side wall and a bottom wall of each of the annular trenches belonging to the trench group by thermal oxidation, modifying a portion of the semiconductor layer sandwiched between the annular trenches adjacent each other into an insulator by the thermal oxidation, and forming a boundary insulating film forming a boundary between the annular trenches adjacent each other;
• a third step of forming a side wall insulating film including a second insulating film, the boundary insulating film, an embedded insulating film and the first insulating film on each of the inside and outside of the main trench and a furth including the first insulating film and the second insulating film on the bottom wall of the main trench, by depositing an insulating material in the trench group after the second step to form the embedded insulating film back-filling the sub-trenches and the second insulating film extending along an inner surface of the main trench;
• a fourth step of forming a contact hole exposing a part of the semiconductor layer in the bottom wall of the main trench by selectively removing the bottom wall insulating film in the main trench;
• and
• a fifth step of forming an embedded electrode back-filling the main trench and connected to the semiconductor layer via the contact hole by depositing a conductive material in the main trench,
• wherein a thickness of the side wall insulating film in a direction intersecting a depth direction of the trench group is 2 μm or more and 6 μm or less.