US 12,765,358 B2 · Semiconductor device

Abstract

Disclosed is a semiconductor device comprising a first upper power line and a second upper power line extending in a first direction and are spaced apart from each other in a second direction intersecting the first direction, a first semiconductor pattern, a second semiconductor pattern spaced apart in the second direction from the first semiconductor pattern, a third semiconductor pattern spaced apart in the second direction from the second semiconductor pattern, a fourth semiconductor pattern spaced apart in the first direction from the first semiconductor pattern, and a fifth semiconductor pattern spaced apart in the first direction from the third semiconductor pattern. The first to fifth semiconductor patterns are between the first upper power line and the second upper power line. The second semiconductor pattern is between the first semiconductor pattern and the third semiconductor pattern.

Claims20

Dependent claims

A semiconductor device, comprising:

a first upper power line and a second upper power line extending in a first direction and are spaced apart from each other in a second direction intersecting the first direction;
a first semiconductor pattern;
a second semiconductor pattern spaced apart in the second direction from the first semiconductor pattern;
a third semiconductor pattern spaced apart in the second direction from the second semiconductor pattern;
a fourth semiconductor pattern spaced apart in the first direction from the first semiconductor pattern;
and
a fifth semiconductor pattern spaced apart in the first direction from the third semiconductor pattern,
wherein the first to fifth semiconductor patterns are between the first upper power line and the second upper power line,
wherein the second semiconductor pattern is between the first semiconductor pattern and the third semiconductor pattern, and
wherein a distance between the first semiconductor pattern and the third semiconductor pattern is greater than a distance between the fourth semiconductor pattern and the fifth semiconductor pattern.

7 more elements

A semiconductor device, comprising:

a first semiconductor pattern;
a second semiconductor pattern and a third semiconductor pattern overlapping in a first direction with the first semiconductor pattern;
a fourth semiconductor pattern overlapping in a second direction with the first semiconductor pattern, the second direction intersecting the first direction;
and
a fifth semiconductor pattern overlapping in the second direction with the third semiconductor pattern,
wherein the second semiconductor pattern is between the first semiconductor pattern and the third semiconductor pattern, and
wherein a width in the first direction of each of the first to third semiconductor patterns is less than a width in the first direction of each of the fourth and fifth semiconductor patterns.

4 more elements

A semiconductor device, comprising:

a first source/drain structure;
a first semiconductor pattern contacting the first source/drain structure;
a first gate electrode overlapping the first semiconductor pattern;
a second source/drain structure spaced apart in a first direction from the first source/drain structure;
a second semiconductor pattern contacting the second source/drain structure;
a second gate electrode overlapping the second semiconductor pattern;
a third source/drain structure spaced apart in the first direction from the second source/drain structure;
a third semiconductor pattern contacting the third source/drain structure;
a third gate electrode overlapping the third semiconductor pattern;
a fourth source/drain structure spaced apart in a second direction from the first source/drain structure, the second direction intersecting the first direction;
a fourth semiconductor pattern contacting the fourth source/drain structure;
a fourth gate electrode overlapping the fourth semiconductor pattern;
a fifth source/drain structure spaced apart in the second direction from the third source/drain structure;
a fifth semiconductor pattern contacting the fifth source/drain structure;
a fifth gate electrode overlapping the fifth semiconductor pattern;
a first gate separation layer between the first gate electrode and the second gate electrode;
a second gate separation layer between the second gate electrode and the third gate electrode;
and
a third gate separation layer between the fourth gate electrode and the fifth gate electrode,
wherein each of the first to fifth source/drain structures includes an upper source/drain pattern and a lower source/drain pattern, and
wherein the third gate separation layer is between the first gate separation layer and the second gate separation layer.

18 more elements

Dependencies are inferred from the claim text.

Semiconductor device

Life of this patent

Semiconductor device

Life of this patent

Abstract

Claims20