Image sensing structure and method for manufacturing the same

An image sensing structure comprising:

• a first semiconductor device comprising:
• a top side;
• a bottom side opposite to the top side of the first semiconductor device;
• and
• a plurality of first units, each of the plurality of first units comprising:
• a plurality of first interconnects adjacent to the top side of the first semiconductor device;
• and
• a row selector connected to the plurality of first interconnects;
• and
• an analog-to-digital converter (ADC), wherein the ADC directly contacts a first conductive via of the plurality of first interconnects and the row selector directly contacts a second conductive via of the plurality of first interconnects, and the first conductive via and the second conductive via directly contact and are electrically connected to a conductive structure of the plurality of first interconnects;
• a second semiconductor device disposed on the first semiconductor device, the second semiconductor device comprising:
• a top side;
• a bottom side opposite to the top side of the second semiconductor device and facing the top side of the first semiconductor device;
• and
• at least one second unit comprising:
• a photodiode adjacent to the top side of the second semiconductor device and configured to receive the light incident on the top side of the second semiconductor device;
• a transfer gate configured to transmit charges stored in the photodiode to a sensing node;
• and
• a source follower configured to amplify a voltage of the sensing node;
• wherein the top side of the first semiconductor device is bonded to the bottom side of the second semiconductor device, wherein the second semiconductor device includes a photo sensor chip and the first semiconductor device includes an application specific integrated circuit (ASIC) chip, wherein light signals generated by the photodiode of the at least one second unit are directly transmitted to the row selector of one of the plurality of first units through a pixel level hybrid bonding at an interface between the top side of the first semiconductor device and the bottom side of the second semiconductor device, wherein the pixel level hybrid bonding includes a lower conductive structure disposed in the first semiconductor device and an upper conductive structure disposed in the second semiconductor device, wherein a top surface of the lower conductive structure directly contacts and is electrically connected to a bottom surface of the upper conductive structure, wherein the row selector selects a corresponding row for selecting a signal during a time period at a level in accordance with the voltage of the sensing node charged with an output current from the photodiode.

An image sensing structure comprising:

• a first semiconductor device comprising:
• a top side;
• a bottom side;
• and
• at least one first unit comprising:
• a plurality of first interconnects adjacent to the top side of the first semiconductor device;
• a row selector electrically connected to the plurality of first interconnects;
• and
• an analog-to-digital converter (ADC) electrically connected to the row selector through the plurality of first interconnects, wherein the ADC directly contacts a first conductive via of the plurality of first interconnects and the row selector directly contacts a second conductive via of the plurality of first interconnects, and the first conductive via and the second conductive via directly contact and are electrically connected to a conductive structure of the plurality of first interconnects;
• and
• a second semiconductor device disposed on the first semiconductor device, the second semiconductor device comprising:
• a top side;
• a bottom side facing the top side of the first semiconductor device;
• and
• at least one second unit comprising:
• a photodiode disposed in the second semiconductor device and configured to receive the light incident on the top side of the second semiconductor device;
• a transfer gate configured to transmit charges stored in the photodiode to a sensing node;
• and
• a source follower configured to amplify a voltage of the sensing node;
• wherein the top side of the first semiconductor device is bonded to the bottom side of the second semiconductor device through a pixel level hybrid bonding such that one first unit of the first semiconductor device corresponds to one or more second units of the second semiconductor device, wherein the second semiconductor device includes a photo sensor chip and the first semiconductor device includes an application specific integrated circuit (ASIC) chip, wherein light signals generated by the photodiode of the at least one second unit are directly transmitted to the row selector of the at least one first unit through a pixel level hybrid bonding at an interface between the top side of the first semiconductor device and the bottom side of the second semiconductor device, wherein the row selector of the at least one first unit is directly electrically connected to the photodiode of the at least one second unit to control the light signals from the photodiode, wherein the pixel level hybrid bonding includes a lower conductive structure disposed in the first semiconductor device and an upper conductive structure disposed in the second semiconductor device, wherein a top surface of the lower conductive structure directly contacts and is electrically connected to a bottom surface of the upper conductive structure, wherein the row selector selects a corresponding row for selecting a signal during the time period at a level in accordance with the voltage of the sensing node charged with an output current from the photodiode.