US 12,764,963 B2Granted

Methods of forming microelectronic devices

AssigneeMicron Technology, Inc.

InventorsShuangqiang Luo, Lifang Xu, Xiao Li, Jivaan Kishore Jhothiraman, Mohad Baboli

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Abstract

A microelectronic device comprises a stack structure comprising an alternating sequence of conductive material and insulative material arranged in tiers, and having blocks separated by dielectric slot structures. Each of the blocks comprises a stadium structure, a filled trench overlying the stadium structure, support structures extending through the filled trench and tiers of the stack structure, and dielectric liner structures covering sidewalls of the support structures. The stadium structure comprises staircase structures each having steps comprising edges of the tiers of the stack structure. The filled trench comprises a dielectric material interposed between at least two additional dielectric materials. The dielectric liner structures comprise first protrusions at vertical positions of the dielectric material, and second protrusions at vertical positions of the conductive material of the tiers of the stack structure. The second protrusions have greater horizontal dimensions than the first protrusions. Memory devices, electronic systems, and methods are also described.

Claims20

Dependent claims

A method of forming a microelectronic device, comprising:

forming a preliminary stack structure comprising a vertically alternating sequence of sacrificial material and insulative material arranged in tiers, the preliminary stack structure further comprising rows of stadium structures each comprising:
at least two of the stadium structures neighboring one another in a first horizontal direction and each comprising staircase structures having steps comprising edges of at least some of the tiers of the preliminary stack structure;
forming dielectric liner material over the steps of the staircase structures of the at least two of the stadium structures;
forming additional dielectric liner material over the dielectric liner material using a material deposition process employing a temperature greater than or equal to about 630° C.;
forming dielectric fill material over the additional dielectric liner material to substantially fill trenches overlying and within horizontal areas of the at least two of the stadium structures;
forming openings vertically extending through the dielectric fill material, the additional dielectric liner material, the dielectric liner material, and the at least some of the tiers of the preliminary stack structure, wherein the openings comprise:
a first horizontally projecting portion formed by horizontally recessing the additional dielectric liner material;
at least one second horizontally projecting portions formed by horizontally recessing the sacrificial material of the at least some of the tiers of the preliminary stack structure;
and
the first horizontal projecting portion has a smaller horizontal dimension than the at least one second horizontally projecting portions;
forming support structures in the openings;
and
replacing the sacrificial material of the preliminary stack structure with a conductive material after forming the support structures.

10 more elements

A method of forming a microelectronic device, comprising:

forming a preliminary stack structure comprising:
tiers respectively including sacrificial material and insulative material vertically neighboring the sacrificial material;
and
a stadium structure having steps comprising horizontal ends of some of the tiers;
forming a filled trench within a horizontal area of the stadium structure and comprising:
a first dielectric material on the steps of the stadium structure;
and
a second dielectric material on the first dielectric material and having a greater density than each of the sacrificial material and the first dielectric material;
forming openings within the horizontal area of the stadium structure and vertically extending through the filled trench and portions of the preliminary stack structure thereunder, the openings respectively comprising:
a first projecting portion horizontally extending into the second dielectric material and having a first horizontal dimension;
and
at least one second projecting portions horizontally extending into the sacrificial material of the tiers and having a second horizontal dimension that is larger than the first horizontal dimension of the first projecting portion;
forming support structures within the openings;
and
replacing the sacrificial material of the tiers with a conductive material.

12 more elements

Dependencies are inferred from the claim text.

Facts

Application: 18/623,507Filed 1 Apr 2024 · division
Priority: 7 Dec 2021
Published: US 2024/0250033 A125 Jul 2024
Granted: 13 Oct 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification3 codes

H10B 43/50
EEPROM devices comprising charge-trapping gate insulators: characterised by the boundary region between the core and peripheral circuit regions
H10B 43/27
With source and drain on different levels, e.g. with sloping channels: the channels comprising vertical portions, e.g. U-shaped channels
H10B
Electronic memory devices

Family

Application17/643,061Parent of this division · filed 7 Dec 2021
US 2024/0250033 A1Pre-grant publication · published 25 Jul 2024
US 11,978,705 B2Parent of this division
US 2023/0178488 A1Published application
US 12,764,963 B2This patent

From the US filing history. Foreign family members aren’t listed.