Semiconductor device having reduced intercell interference and electronic system including the same

A semiconductor device comprising:

• a plurality of conductive patterns extending on a substrate in a lateral direction parallel to a surface of the substrate, the plurality of conductive patterns overlapping each other in a vertical direction to the surface of the substrate;
• a plurality of insulating patterns alternatingly stacked between the plurality of conductive patterns, respectively, the plurality of insulating patterns extending in the lateral direction;
• a channel film extending in the vertical direction inside a channel hole passing through the plurality of conductive patterns and the plurality of insulating patterns;
• a plurality of charge trap patterns between the plurality of conductive patterns and the channel film inside the channel hole, the plurality of charge trap patterns being spaced apart from each other in the vertical direction;
• a tunneling dielectric film between the plurality of charge trap patterns and the channel film;
• and
• a blocking dielectric film extending in the vertical direction inside the channel hole between the plurality of conductive patterns and the plurality of charge trap patterns, and between the plurality of insulating patterns and the tunneling dielectric film,
• wherein each of the plurality of insulating patterns comprises a first insulating pattern overlapping the plurality of conductive patterns in the vertical direction and a second insulating pattern protruding in the lateral direction from the first insulating pattern into the channel hole and toward the channel film, the first insulating pattern having a first dielectric constant, and the second insulating pattern having a second dielectric constant that is lower than the first dielectric constant.

An electronic system comprising:

• a main substrate;
• a semiconductor device on the main substrate;
• and
• a controller electrically connected to the semiconductor device on the main substrate,
• wherein the semiconductor device comprises:
• a conductive pattern on a substrate, the conductive pattern extending in a lateral direction parallel to a surface of the substrate;
• an insulating pattern on the substrate, the insulating pattern extending in the lateral direction parallel to the conductive pattern;
• a channel film extending in a vertical direction to the surface of the substrate inside a channel hole passing through the conductive pattern and the insulating pattern;
• a charge trap pattern between the conductive pattern and the channel film inside the channel hole;
• a tunneling dielectric film between the charge trap pattern and the channel film;
• and
• a blocking dielectric film extending in the vertical direction inside the channel hole between the conductive pattern and the charge trap pattern, and between the insulating pattern and the tunneling dielectric film, the blocking dielectric film having a portion disposed between the insulating pattern and the conductive pattern in the vertical direction,
• wherein the insulating pattern comprises a first insulating pattern overlapping the conductive pattern in the vertical direction and a second insulating pattern protruding in the lateral direction from the first insulating pattern into the channel hole and toward the channel film, the first insulating pattern having a first dielectric constant, and the second insulating pattern having a second dielectric constant that is lower than the first dielectric constant.