Three-dimensional semiconductor memory device

A three-dimensional semiconductor memory device comprising:

• a first bit line extending longitudinally in a first direction that is perpendicular to an upper surface of a substrate;
• first and second semiconductor patterns that are in contact with a side surface of the first bit line, are spaced apart from each other in the first direction and extends longitudinally in a second direction that is parallel to the upper surface of the substrate, each of the first and second semiconductor patterns comprising a first end in contact with the first bit line and a second end opposite to the first end;
• a first word line adjacent to an upper surface of the first semiconductor pattern and extending longitudinally in a third direction crossing the first and second directions;
• a second word line adjacent to an upper surface of the second semiconductor pattern and extending longitudinally in the third direction;
• a first selection line adjacent to the second end of the first semiconductor pattern and extending longitudinally in the third direction;
• a second selection line adjacent to the second end of the second semiconductor pattern and extending longitudinally in the third direction;
• a third semiconductor pattern between the first semiconductor pattern and the first selection line;
• a fourth semiconductor pattern between the second semiconductor pattern and the second selection line;
• a source line extending longitudinally in the first direction and in contact with first ends of the third and fourth semiconductor patterns;
• and
• a second bit line in contact with second ends of the third and fourth semiconductor patterns and extending longitudinally in the first direction.

A three-dimensional semiconductor memory device comprising:

• a first bit line extending longitudinally in a first direction that is perpendicular to an upper surface of a substrate;
• a first semiconductor pattern extending longitudinally in a second direction that is parallel to the upper surface of the substrate and comprising a first end and a second end opposite to each other, the first end of the first semiconductor pattern being in contact with the first bit line;
• a first word line on a middle portion of the first semiconductor pattern and extending longitudinally in a third direction that crosses the second direction and is parallel to the upper surface of the substrate;
• a selection line adjacent to the second end of the first semiconductor pattern and parallel to the third direction;
• a second semiconductor pattern that is between the selection line and the first semiconductor pattern and comprises first and second ends opposite to each other;
• a second bit line that extends longitudinally in the first direction and is in contact with the first end of the second semiconductor pattern;
• and
• a source line that is in contact with the second end of the second semiconductor pattern and extends longitudinally in the first direction,
• wherein the first bit line, the first semiconductor pattern, the first word line, the second semiconductor pattern, the second bit line, and the source line constitute a first structure, and
• wherein the three-dimensional semiconductor memory device comprises two first structures, and the two first structures are in mirror symmetry with respect to the selection line, and the two first structures share the selection line.