Integrated circuit device and method of manufacturing the same

A method of manufacturing an integrated circuit device, the method comprising:

• forming a plurality of lower electrodes above a substrate;
• forming a supporter configured to support the plurality of lower electrodes;
• forming a dielectric film on the plurality of lower electrodes and the supporter;
• and
• forming an upper electrode on the dielectric film, wherein
• the dielectric film includes a lower leakage current prevention layer on an outer surface of each of the plurality of lower electrodes and an outer surface of the supporter, a first capacitor material layer on the lower leakage current prevention layer, an upper material layer on the first capacitor material layer, a second capacitor material layer on the upper material layer, and an upper leakage current prevention layer on the second capacitor material layer wherein
• the lower leakage current prevention layer and the upper leakage current prevention layer each include a dielectric material doped with impurities, and
• the impurities include at least one of aluminum (Al), silicon (Si), magnesium (Mg), calcium (Ca), cobalt (Co), yttrium (Y), tantalum (Ta), niobium (Nb), hafnium (Hf), zirconium (Zr), and molybdenum (Mo).

A method of manufacturing an integrated circuit device, the method comprising:

• forming an isolation film on a substrate, the isolation film defining an active region of the substrate;
• forming a gate structure on the substrate, the gate structure crossing the active region and extending in a first direction;
• forming a source/drain in the active region, the source/drain respectively at opposite sides of the gate structure;
• forming a bit line structure on the substrate, the bit line structure extending in a second direction, the second direction being perpendicular to the first direction;
• forming a plurality of contact structures on the source/drain, respectively;
• forming a plurality of lower electrodes on the plurality of contact structures, respectively;
• forming a supporter configured to support the plurality of lower electrodes;
• forming a dielectric film on the plurality of lower electrodes and the supporter;
• forming a titanium oxide thin film on the supporter and the plurality of lower electrodes;
• and
• forming an upper electrode on the dielectric film, wherein
• the dielectric film includes a lower leakage current prevention layer on an outer surface of each of the plurality of lower electrodes and an outer surface of the supporter, a first capacitor material layer on the lower leakage current prevention layer, an upper material layer on the first capacitor material layer, and a second capacitor material layer on the upper material layer,
• the titanium oxide thin film is formed between the lower leakage current prevention layer and the supporter,
• the titanium oxide thin film is formed between the lower leakage current prevention layer and the plurality of lower electrodes,
• the titanium oxide thin film is doped with a group V element as an impurity, and
• the dielectric film further includes an upper leakage current prevention layer on the second capacitor material layer.