Printed circuit board
AssigneeLG Innotek Co., Ltd.
InventorsIl Sik Nam, Yong Suk Kim, Dong Keun Lee, Tae Ki Kim, Hye Jin Jo
Life of this patent
Estimating the term…
Abstract
A printed circuit board according to an embodiment includes an insulating layer; a first pad disposed on an upper surface of the insulating layer; a second pad disposed on a lower surface of the insulating layer; a first device mounted on the first pad; a second device mounted on the second pad; a first molding layer disposed on the insulating layer and molding the first device; and a second molding layer disposed on the lower surface of the insulating layer and molding the second device, wherein a lower surface of the second molding layer is positioned on the same plane as a lower surface of the second device.
Claims17
A circuit board comprising:
- an outermost insulating layer;
- a protective layer disposed on the outermost insulating layer;
- a pad disposed between the outermost insulating layer and the protective layer and protruding from the outermost insulating layer;
- and
- a bump disposed on the pad;
- wherein the pad includes a seed layer disposed on the outermost insulating layer, and an electroplating layer disposed on the seed layer and electroplated using the seed layer,
- wherein a horizontal width of the seed layer is greater than a horizontal width of the electroplating layer,
- wherein the seed layer includes a first portion vertically overlapping the electroplating layer and the bump, and a second portion vertically overlapping the protective layer and not overlapping the electroplating layer and the bump,
- wherein a top surface of the first portion of the seed layer is in contact with the electroplating layer, and a top surface of the second portion of the seed layer is in contact with the protective layer,
- wherein the first portion of the seed layer and the second portion of the seed layer are spaced apart from each other in a horizontal direction, and
- wherein a spaced region between the first portion of the seed layer and the second portion of the seed layer does not vertically overlap the electroplating laver, the bump, and the protective layer.
A circuit board comprising:
- an outermost insulating layer;
- a protective layer disposed on the outermost insulating layer;
- a pad disposed between the outermost insulating layer and the protective layer and protruding from the outermost insulating layer;
- and
- a bump disposed on the pad;
- wherein the pad includes a seed layer disposed on the outermost insulating layer, and an electroplating layer disposed on the seed layer and electroplated using the seed layer,
- wherein a horizontal width of the seed layer is greater than a horizontal width of the electroplating layer,
- wherein the seed layer includes:
- a first portion vertically overlapping the electroplating layer and the bump,
- a second portion vertically overlapping the protective layer and not overlapping the electroplating layer and the bump, and
- a third portion disposed between the first portion and the second portion, vertically overlapping the electroplating layer and not overlapping the bump and the protective layer,
- wherein top surfaces of the first portion and the third portion of the seed layer are in contact with the electroplating layer, and a top surface of the second portion of the seed layer is in contact with the protective layer.
Dependencies are inferred from the claim text.