Methods of constructing and using low-power QDE-zipper codes, and systems, apparatuses, methods, and non-transitory computer-readable storage devices employing same

One or more processors functionally coupled to one or more non-transitory computer-readable storage devices, the one or more non-transitory computer-readable storage devices comprising computer-executable instructions, wherein the instructions, when executed, cause the one or more processors to perform a method comprising:

• encoding a plurality of information bits into a plurality of coded bits using a zipper code associated with a first mapping function φ1 and a second mapping function φ2;
• wherein the zipper code is associated with a real buffer, a first virtual buffer, and a second virtual buffer, each comprising a plurality of sections;
• wherein each section of the real buffer, a corresponding section of the first virtual buffer, and a corresponding section of the second virtual buffer form a codeword of a component code;
• wherein the real buffer is for receiving the plurality of information bits into the plurality of sections thereof;
• wherein the first mapping function φ1 and the second mapping function φ2 are for mapping each group of c bits, where c>1 is an integer, in each section of the real buffer to c mapped bits in one or more first subsequent sections of the first virtual buffer and to c mapped bits in one or more second subsequent sections of the second virtual buffer, respectively;
• wherein the c mapped bits in the first virtual buffer are in different sections thereof, and/or the c mapped bits in the second virtual buffer are in different sections thereof;
• and
• wherein, when bit positions of the sections of the real buffer, bit positions of the sections of the first virtual buffer, and bit positions of the sections of the second virtual buffer are separately and corresondingly numbered,
• for each section of the real buffer,
• the bit positions of the bits in the section of the real buffer, the bit positions of the corresponding mapped bits in any one of the one or more first subsequent sections of the first virtual buffer, and the bit positions of the corresponding mapped bits in any one of the one or more second subsequent sections of the second virtual buffer only have one bit position in common.

One or more non-transitory computer-readable storage media comprising computer-executable instructions, wherein the instructions, when executed, cause one or more processors to perform a method comprising:

• encoding a plurality of information bits into a plurality of coded bits using a zipper code associated with a first mapping function φ1 and a second mapping function φ2;
• wherein the zipper code is associated with a real buffer, a first virtual buffer, and a second virtual buffer, each comprising a plurality of sections;
• wherein each section of the real buffer, a corresponding section of the first virtual buffer, and a corresponding section of the second virtual buffer form a codeword of a component code;
• wherein the real buffer is for receiving the plurality of information bits into the plurality of sections thereof;
• wherein the first mapping function φ1 and the second mapping function φ2 are for mapping each group of c bits, where c>1 is an integer, in each section of the real buffer to c mapped bits in one or more first subsequent sections of the first virtual buffer and to c mapped bits in one or more second subsequent sections of the second virtual buffer, respectively;
• wherein the c mapped bits in the first virtual buffer are in different sections thereof, and/or the c mapped bits in the second virtual buffer are in different sections thereof;
• and
• wherein, when bit positions of thee sections of the real buffer, bit positions of the sections of the first virtual buffer, and bit positions of the sections of the second virtual buffer are separately and corresponding numbered,
• for each section of the real buffer,
• the bit positions of the bits in the section of the real buffer, the bit positions of the corresponding mapped bits in any one of the one or more first subsequent sections of the first virtual buffer, and the bit positions of the corresponding mapped bits in any one of the one or more second subsequent sections of the second virtual buffer only have one bit position in common.

A method comprising:

• decoding a plurality of coded bits into a plurality of information bits using a zipper code associated with a first mapping function φ1 and a second mapping function φ2;
• wherein the zipper code is associated with a real buffer, a first virtual buffer, and a second virtual buffer, each comprising a plurality of sections;
• wherein each section of the real buffer, a corresponding section of the first virtual buffer, and a corresponding section of the second virtual buffer form a codeword of a component code;
• wherein the real buffer is for receiving the plurality of coded bits into the plurality of sections thereof;
• wherein the first mapping function φ1 and the second mapping function φ2 are for mapping bits in each section of the real buffer to a plurality of first subsequent sections of the first virtual buffer and to bits in one or more second subsequent sections of the second virtual buffer, respectively;
• and
• wherein said decoding the plurality of coded bits comprises:
• determining that a syndrome of a first codeword is nonzero, the first codeword comprising a first one of the plurality of sections of the real buffer, and corresponding to plurality of second codewords comprising bits mapped from the bits of the first one of the plurality of sections of the real buffer,
• calculating syndromes of the plurality of second codewords,
• determining values of a plurality of variables, each of the plurality of variables corresponding to one of the plurality of second codewords, and having a value of binary zero if the syndrome of the corresponding second codeword is zero or a value of binary one if the syndrome of the corresponding second codeword is nonzero, and
• correcting a plurality of bits of the first one of the plurality of sections of the real buffer by determining values thereof based on the values of the plurality of variables.

One or more processors functionally coupled to one or more non-transitory computer-readable storage devices, the one or more non-transitory computer-readable storage devices comprising computer-executable instructions, wherein the instructions, when executed, cause the one or more processors to perform a method comprising:

• decoding a plurality of coded bits into a plurality of information bits using a zipper code associated with a first mapping function φ1 and a second mapping function φ2;
• wherein the zipper code is associated with a real buffer, a first virtual buffer, and a second virtual buffer, each comprising a plurality of sections;
• wherein each section of the real buffer, a corresponding section of the first virtual buffer, and a corresponding section of the second virtual buffer form a codeword of a component code;
• wherein the real buffer is for receiving the plurality of coded bits into the plurality of sections thereof;
• wherein the first mapping function φ1 and the second mapping function φ2 are for mapping bits in each section of the real buffer to a plurality of first subsequent sections of the first virtual buffer and to bits in one or more second subsequent sections of the second virtual buffer, respectively;
• and
• wherein said decoding the plurality of coded bits comprises:
• determining that a syndrome of a first codeword is nonzero, the first codeword comprising a first one of the plurality of sections of the real buffer, and corresponding to plurality of second codewords comprising bits mapped from the bits of the first one of the plurality of sections of the real buffer,
• calculating syndromes of the plurality of second codewords,
• determining values of a plurality of variables, each of the plurality of variables corresponding to one of the plurality of second codewords, and having a value of binary zero if the syndrome of the corresponding second codeword is zero or a value of binary one if the syndrome of the corresponding second codeword is nonzero, and
• correcting a plurality of bits of the first one of the plurality of sections of the real buffer by determining values thereof based on the values of the plurality of variables.

One or more non-transitory computer-readable storage media comprising computer-executable instructions, wherein the instructions, when executed, cause one or more processors to perform a method comprising:

• decoding a plurality of coded bits into a plurality of information bits using a zipper code associated with a first mapping function φ1 and a second mapping function φ2;
• wherein the zipper code is associated with a real buffer, a first virtual buffer, and a second virtual buffer, each comprising a plurality of sections;
• wherein each section of the real buffer, a corresponding section of the first virtual buffer, and a corresponding section of the second virtual buffer form a codeword of a component code;
• wherein the real buffer is for receiving the plurality of coded bits into the plurality of sections thereof;
• wherein the first mapping function φ1 and the second mapping function φ2 are for mapping bits in each section of the real buffer to a plurality of first subsequent sections of the first virtual buffer and to bits in one or more second subsequent sections of the second virtual buffer, respectively;
• and
• wherein said decoding the plurality of coded bits comprises:
• determining that a syndrome of a first codeword is nonzero, the first codeword comprising a first one of the plurality of sections of the real buffer, and corresponding to plurality of second codewords comprising bits mapped from the bits of the first one of the plurality of sections of the real buffer,
• calculating syndromes of the plurality of second codewords,
• determining values of a plurality of variables, each of the plurality of variables corresponding to one of the plurality of second codewords, and having a value of binary zero if the syndrome of the corresponding second codeword is zero or a value of binary one if the syndrome of the corresponding second codeword is nonzero, and
• correcting a plurality of bits of the first one of the plurality of sections of the real buffer by determining values thereof based on the values of the plurality of variables.