Apparatus including a CMOS pass gate circuit and a bootstrap circuit
AssigneeMicrosemi SoC Corporation
InventorsJohn Lynn McCollum, Fethi Dhaoui
Life of this patent
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Abstract
One or more examples relate to a complementary metal-oxide-semiconductor (CMOS) device. The CMOS device includes a CMOS pass gate circuit, a control circuit, and a bootstrap circuit. The CMOS pass gate circuit includes an n-channel transistor and a p-channel transistor. The control circuit may activate and deactivate the CMOS pass gate circuit. The bootstrap circuit may be electrically connected between the CMOS pass gate circuit and the control circuit. The bootstrap circuit may increase a first drive gain of the n-channel transistor and a second drive gain of the p-channel transistor.
Claims20
An apparatus comprising:
- a complementary metal-oxide-semiconductor (CMOS) pass gate circuit including a first n-channel transistor and a first p-channel transistor;
- a control circuit to generate control signals to activate the CMOS pass gate circuit;
- a bootstrap circuit electrically connected between the CMOS pass gate circuit and the control circuit, said bootstrap circuit to increase a first drive gain of the first n-channel transistor and a second drive gain of the first p-channel transistor;
- and
- an input terminal electrically connected to the CMOS pass gate circuit, said input terminal to convey an input signal to the CMOS pass gate circuit, said input signal to alternate between a high voltage level and a low voltage level, said high voltage level being greater than said low voltage level,
- wherein said bootstrap circuit comprises a second n-channel transistor and a second p-channel transistor, said second n-channel transistor electrically connected between the control circuit and the first n-channel transistor, said second p-channel transistor electrically connected between the control circuit and the first p-channel transistor,
- said second n-channel transistor to receive a first complementary control signal of the control signals and convey a first drive voltage corresponding to the first complementary control signal to the first n-channel transistor, said first drive voltage to activate the first n-channel transistor and increase the first drive gain,
- said second p-channel transistor to receive a second complementary control signal of the control signals and convey a second drive voltage corresponding to the second complementary control signal to the first p-channel transistor, said second drive voltage to activate the first p-channel transistor and increase the second drive gain,
- respective ones of said first p-channel transistor, first n-channel transistor, second p-channel transistor, and second n-channel transistor including a respective gate terminal, a respective source terminal, and a respective drain terminal,
- a first capacitive coupling being formed between the gate and source terminals of the first n-channel transistor, said first capacitive coupling generated by the first drive voltage,
- a second capacitive coupling being formed between the gate and source terminals of the first p-channel transistor, said second capacitive coupling generated by the second drive voltage.
A circuit arrangement comprising:
- a complementary metal-oxide-semiconductor (CMOS) pass gate circuit including a first n-channel transistor and a first p-channel transistor;
- a bootstrap circuit electrically connected to the CMOS pass gate circuit, said bootstrap circuit to increase a drive gain of the CMOS pass gate circuit;
- and
- an input terminal to receive an input signal, said input terminal electrically connected to the respective source terminals of the first n-channel transistor and the first p-channel transistor,
- wherein said bootstrap circuit comprises a second n-channel transistor electrically connected to the first n-channel transistor and a second p-channel transistor electrically connected to the first p-channel transistor,
- said second n-channel transistor to convey a first drive voltage to the first n-channel transistor,
- said second p-channel transistor to convey a second drive voltage to the first p-channel transistor,
- respective ones of said first p-channel transistor, first n-channel transistor, second p-channel transistor, and second n-channel transistor including a respective gate terminal, a respective source terminal, and a respective drain terminal,
- a first capacitive coupling being formed between the gate and source terminals of the first n-channel transistor, said first capacitive coupling generated by the first drive voltage,
- a second capacitive coupling being formed between the gate and source terminals of the first p-channel transistor, said second capacitive coupling generated by the second drive voltage.
A method comprising:
- activating, by one or more power supplies, a bootstrap circuit;
- generating, by a control circuit, one or more control signals;
- activating, by the bootstrap circuit, a complementary metal-oxide-semiconductor (CMOS) pass gate circuit based on the one or more control signals;
- receiving, by the CMOS pass gate circuit, an input signal;
- increasing, by the bootstrap circuit, a drive gain of the CMOS pass gate circuit;
- receiving, by a first n-channel transistor of the CMOS pass gate circuit, a first drive voltage corresponding to a first complementary control signal of the one or more control signals from the bootstrap circuit;
- receiving, by a first p-channel transistor of the CMOS pass gate circuit, a second drive voltage corresponding to a second complementary control signal of the one or more control signals from the bootstrap circuit;
- generating, in response to receiving the first drive voltage at the first n-channel transistor, a first capacitive coupling between a gate terminal and a source terminal of the first n-channel transistor, and
- generating, in response to receiving the second drive voltage at the first p-channel transistor, a second capacitive coupling between a gate terminal and a source terminal of the first p-channel transistor.
Dependencies are inferred from the claim text.