Multiple or single voltage domain logic gate circuitry

A method, comprising:

• receiving a first input signal in a first voltage domain at a first logic gate circuit, the first logic gate circuit comprising:
• a first logic function circuit coupled to the first input signal and further coupled between a first output terminal and a reference voltage;
• and
• a second logic function circuit coupled to the first input signal and further complementary to the first logic function circuit and coupled between the first output terminal and a first header transistor;
• operating the first logic gate circuit to perform a first type of Boolean function on the first input signal to generate an output signal in a second voltage domain;
• receiving the first input signal at a second logic gate circuit, the second logic gate circuit comprising:
• a third logic function circuit coupled to the first input signal and further coupled between a second output terminal and the reference voltage, the third logic function circuit identical to the first logic function circuit;
• and
• a fourth logic function circuit coupled to the first input signal and further complementary to the third logic function circuit and coupled between the second output terminal and a second voltage rail, the fourth logic function circuit identical to the second logic function circuit;
• operating the second logic gate circuit to perform a second type of Boolean function on the first input signal to generate a header control signal, wherein the second type of Boolean function is a complementary type to the first type of Boolean function;
• receiving the output signal at a first header gate of the first header transistor to control power supplied to the second logic gate circuit;
• and
• receiving the header control signal at a second header gate of a second header transistor to control power supplied to the first logic gate circuit.

A non-transitory computer-readable medium storing computer-readable code for fabrication of an apparatus comprising:

• a first logic gate circuit to implement a first type of Boolean function and comprising a first input terminal connected to an input signal line and a first output terminal connected to an output signal line, wherein the input signal line is in a first voltage domain and the output signal line is in a second voltage domain, the first logic gate circuit comprising:
• a first logic function circuit coupled to the input signal line and further coupled between the first output terminal and a reference voltage;
• and
• a second logic function circuit coupled to the input signal line and further complementary to the first logic function circuit and coupled between the first output terminal and a first header transistor;
• a second logic gate circuit to implement a second type of Boolean function and comprising a second input terminal connected to the input signal line and a second output terminal connected to a header control signal line, wherein the second type of Boolean function is a complementary type to the first type of Boolean function, the second logic gate circuit comprising:
• a third logic function circuit coupled to the input signal line and further coupled between the second output terminal and the reference voltage, the third logic function circuit identical to the first logic function circuit;
• and
• a fourth logic function circuit coupled to the input signal line and further complementary to the third logic function circuit and coupled between the second output terminal and a second voltage rail, the fourth logic function circuit identical to the second logic function circuit;
• the first header transistor to switchably couple an output voltage rail to the first logic gate circuit via a first header gate connected to the header control signal line, wherein the output voltage rail is in the second voltage domain;
• and
• a second header transistor to switchably couple the output voltage rail to the second logic gate circuit via a second header gate connected to the output signal line.