Memory device, memory system, and operating method of memory device

An operating method of a memory device, the operating method comprising:

• receiving a read duty cycle correct command and a read enable signal from a memory controller;
• when the read enable signal is received, performing a read duty cycle correct operation, based on the read duty cycle correct command, and outputting a data strobe signal, based on the read duty cycle correct operation;
• receiving the data strobe signal and generating first to fourth clock signals having different phases from each other based on the data strobe signal;
• and
• performing a write duty cycle correct operation to correct a duty cycle for the first to fourth clock signals,
• wherein the read duty cycle correct operation and the write duty cycle correct operation are performed simultaneously.

A memory system comprising:

• a memory controller configured to generate a read duty cycle correct command and a read enable signal;
• and
• a memory device configured to perform a training operation with respect to a read signal and a write signal,
• wherein the memory device comprises:
• a first pad configured to receive the read enable signal from the memory controller;
• a second pad configured to receive the read duty cycle correct command signal;
• a first duty correction circuit configured to perform a read duty cycle correct operation, based on the read duty cycle correct command signal received from the memory controller, when the read enable signal is received, and output a data strobe signal, based on the read duty cycle correct operation;
• and
• a second duty correction circuit configured to receive the data strobe signal from the first duty correction circuit, generate first to fourth clock signals having different phases from each other based on the data strobe signal, and perform a write duty cycle correct operation to correct a duty cycle for the first to fourth clock signals,
• wherein the read duty cycle correct operation and the write duty cycle correct operation are performed simultaneously.