Non-volatile memory with hole pre-charge and isolated signal lines

A method for programming memory cells from an erased threshold voltage distribution to one or more programmed threshold voltage distributions, comprising:

• performing hole pre-charging of channels of unselected NAND strings in a selected block of a selected plane including applying a source voltage to a selected signal line of a plurality of signal lines that are electrically isolated from each other and are connected to the plane, the selected signal line is positioned between the selected block and an unselected block and is connected to a selected source line of a plurality of source lines, the plurality of source lines are connected to the plane such that the selected source line is connected to the selected block and unselected source lines are not connected to the selected block, each source line of the plurality of source lines is connected to a subset of blocks of the plane, the source voltage is greater in magnitude than any predetermined threshold voltage of the erased threshold voltage distribution, the performing hole pre-charging includes applying the source voltage to the selected source line of the plurality of source lines without applying the source voltage to all source lines of the plurality of source lines;
• and
• after the pre-charging, boosting channels of unselected NAND strings in the selected block and applying a program voltage to selected NAND strings in the selected block.

A non-volatile storage apparatus, comprising:

• non-volatile memory cells arranged as NAND strings in blocks;
• a plurality of source lines connected to the memory cells such that each source line of the plurality of source lines is connected to a subset of the blocks and each block is connected to one of the source lines of the plurality of source lines;
• a plurality of signal lines positioned between the blocks;
• isolation layers positioned between the blocks, the isolation layers electrically isolate source lines of the plurality of source lines from each other;
• and
• a control circuit connected to the non-volatile memory cells and the plurality of signal lines, the control circuit includes one or more voltage sources, the plurality of signal lines are connected to the one or more voltage sources and are connected to the plurality of source lines for applying voltage from the one or more voltage sources to the plurality of source lines, the control circuit is configured to program memory cells of a selected block by performing hole pre-charging of channels of unselected NAND strings in the selected block followed by boosting channels of unselected NAND strings in the selected block and applying a program voltage to selected NAND strings in the selected block, the control circuit is configured to perform hole pre-charging by applying a source voltage to a selected source line of the plurality of source lines for a selected block via a selected signal line of the plurality of signal lines without applying the source voltage to all source lines of the plurality of source lines, the source voltage is greater in magnitude than any predetermined threshold voltage of an erased threshold voltage distribution for the memory cells.