Display module and electronic device including the display module

A display module comprising:

• a plurality of pixels;
• and
• a gate driving circuit,
• wherein:
• the gate driving circuit comprises a plurality of stages electrically connected with the plurality of pixels, and
• a first stage among the plurality of stages comprises:
• a first upper output terminal which transfers a first non-inverted output signal to at least one of the plurality of pixels;
• a first carry terminal electrically connected to a first upper charging node and a second stage among the plurality of stages;
• a first high-potential terminal configured to receive a high signal having a first potential;
• a first low-potential terminal configured to receive a low signal having a second potential lower than the first potential;
• a first clock terminal configured to receive a first clock signal;
• a first input terminal configured to receive one of an initialization signal and a carry signal, wherein the carry signal is an electrical signal received from a stage other than the first stage among the plurality of stages;
• a first upper input transistor disposed between the first high-potential terminal and the first upper charging node and which turns on or turns off in response to the first clock signal;
• a first lower input transistor disposed between a first lower charging node insulated from the first upper charging node and the first low-potential terminal and which turns on or turns off based on a potential of the first input terminal;
• a first main capacitor disposed between the first upper input transistor and the first lower input transistor;
• a first lower inverting transistor disposed between the first lower charging node and a first output node and which turns on or turns off based on a potential of the first clock terminal;
• a first upper inverting transistor disposed between the first lower inverting transistor and the first high-potential terminal and which turns on or turns off based on a potential of the first clock terminal;
• a first main boosting transistor disposed between the first low-potential terminal and the first upper charging node and which turns on or turns off based on a potential of the first output node;
• a first upper main output transistor disposed between the first high-potential terminal and the first upper output terminal and which turns on or turns off based on a potential of the first output node;
• and
• a first lower main output transistor disposed between the first low-potential terminal and the first upper output terminal and which turns on or turns off based on a potential of the first output node.

An electronic device comprising:

• a display module configured to emit light;
• a processor configured to control the display module;
• a memory having data for operation of the display module or the processor stored therein;
• and
• a power module configured to generate or supply power,
• wherein:
• the display module comprises a plurality of pixels and a gate driving circuit,
• the gate driving circuit comprises a plurality of stages electrically connected with the plurality of pixels,
• a first stage among the plurality of stages receives a high signal having a first potential, a low signal having a second potential lower than the first potential, and a first clock signal,
• the first stage comprises:
• a first charging unit comprising a first main capacitor disposed between a first upper charging node and a first lower charging node;
• a first inverting unit which transfers the high signal to a first output node or electrically connects the first lower charging node to the first output node in response to the first clock signal;
• a first main boosting unit which transfers the low signal to the first upper charging node based on a potential of the first output node;
• a first main output unit which provides a first non-inverted output signal to at least one of the plurality of pixels based on a potential of the first output node;
• and
• a first sub-output unit which provides a first inverted output signal to at least one of the plurality of pixels based on a potential of the first output node and a potential of the first non-inverted output signal, and
• one of the first non-inverted output signal and the first inverted output signal is the high signal, and the other of the first non-inverted output signal and the first inverted output signal is the low signal.